[Gc] gc6.5 patch for AIX 5.1

Dan Bonachea bonachea at cs.berkeley.edu
Tue Jul 19 15:07:40 PDT 2005


The threaded collector fails at startup on AIX ver 5.1 and earlier starting in 
GC v6.5, due to the recent removal of the GC's AIX-specific thread support (in 
favor of the generic thread support). The problem is POSIX semaphores (which 
are used by the generic thread support) were not implemented until AIX 5.2.

The small patch to gc 6.5 attached fixes this issue by implementing the needed 
semaphore functionality as a thin wrapper around the AIX compare-and-swap 
support, which dates back to at least AIX 3.1. It also fixes a compile error 
in the threaded support due to a missing system header #include.

Dan
-------------- next part --------------
--- gc-orig/include/private/gc_priv.h Tue, 15 Mar 2005 06:29:54 -0800 bonachea (titaniumc/L/b/28_gc_priv.h 1.2 600)
+++ gc-new/include/private/gc_priv.h Tue, 19 Jul 2005 14:24:14 -0700 bonachea (titaniumc/L/b/28_gc_priv.h 1.3 600)
@@ -1955,6 +1955,8 @@
        /* Linuxthreads itself uses SIGUSR1 and SIGUSR2.			*/
 #      define SIG_SUSPEND SIGPWR
 #    endif
+#   elif defined(GC_AIX_THREADS) && defined(_AIX) && !defined(_AIX52)
+#       define SIG_SUSPEND SIGPWR
 #   else  /* !GC_LINUX_THREADS */
 #     if defined(_SIGRTMIN)
 #       define SIG_SUSPEND _SIGRTMIN + 6
@@ -1966,4 +1968,81 @@
   
 # endif
 
+#if defined(GC_AIX_THREADS) && defined(_AIX) && !defined(_AIX52)
+/* AIX 5.1 and earlier lack a working sem_t library, so fake it */
+#include <semaphore.h>
+#include <errno.h>
+#include <sys/atomic_op.h>
+/* implementation using kernel compare_and_swap, which is documented to be signal safe */
+typedef struct  {
+  volatile int _ctr;
+} GC_AIX_sem_t;
+#define sem_t GC_AIX_sem_t
+#define sem_init(s,v,v2) (((v)||(v2))?(errno=EINVAL,-1):((s)->_ctr = 0), 0)
+#define sem_getvalue(s,pi) (*(pi) = (s)->_ctr, 0)
+#define sem_post(s) GC_AIX_sem_post(s) 
+#define sem_wait(s) GC_AIX_sem_wait(s,1)
+#define sem_trywait(s) GC_AIX_sem_wait(s,0)
+#define sem_destroy(s) (((s)->_ctr = -1), 0)
+static int GC_AIX_sem_post(GC_AIX_sem_t *_s) {
+  int _oldval = _s->_ctr;
+  int _newval = _oldval + 1;
+  while (!compare_and_swap((atomic_p)&((_s)->_ctr), &_oldval, _newval)) {
+    _newval = _oldval + 1;
+  }
+  return 0;
+}
+static int GC_AIX_sem_wait(GC_AIX_sem_t *_s, int _blocking) {
+  int _success = 0;
+  do {
+    int _oldval, _newval;
+    if (_blocking) {
+      while ((_oldval=_s->_ctr) == 0) sched_yield();
+    } else {
+      if ((_oldval=_s->_ctr) == 0) return EAGAIN;
+    }
+    _newval = _oldval - 1;
+    if (compare_and_swap((atomic_p)&((_s)->_ctr), &_oldval, _newval)) _success = 1;
+  } while (!_success && _blocking);
+  if (_success) return 0;
+  else return EAGAIN;
+}
+#endif
+
 # endif /* GC_PRIVATE_H */
--- gc-orig/mach_dep.c Mon, 23 May 2005 00:18:38 -0700 bonachea (titaniumc/M/b/10_mach_dep.c 1.3 600)
+++ gc-new/mach_dep.c Tue, 19 Jul 2005 14:24:14 -0700 bonachea (titaniumc/M/b/10_mach_dep.c 1.4 600)
@@ -26,7 +26,9 @@
 #     include <machine/reg.h>
 #   endif
 # endif
-
+#if defined(RS6000) || defined(POWERPC)
+#include <ucontext.h>
+#endif
 #if defined(__MWERKS__) && !defined(POWERPC)
 
 asm static void PushMacRegisters()


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