Re: [Gc] Re: Problem: FPE mask reset by GC. Versions 7.X on x86_64 Linux.

Ivan Maidanski ivmai at mail.ru
Wed Feb 9 13:49:22 PST 2011


Hi Jean-Claude,

I've refactored your code. Mine patch is attached (the patch is against the recent snapshot plus the previous patch regarding this subject).

ChangeLog entries:
	* mach_dep.c (GC_with_callee_saves_pushed): Fix and improve code
	introduced by the previous patch (if GETCONTEXT_FPU_EXCMASK_BUG
	and X86_64).

I'll create the updated tarball in several days.

Regards.

Tue, 01 Feb 2011 15:45:59 -0500 письмо от Jean-Claude Beaudoin <jean.claude.beaudoin at gmail.com>:

> Hello Ivan,
> 
> I seem to be a pretty lousy bit twiddler. My previous patch was in fact full
> of bugs.
> For one thing, it trashed the rest of the FPU control word pretty bad messing
> up
> the precision control bits and the rounding control bits. Not a good thing at
> all...
> 
> Here is attached my corrected version. I hope that this time it fixes the
> exception
> problem without any wild side-effects.
> 
> Cheers,
> 
> Jean-Claude Beaudoin
> 
> Ivan Maidanski wrote:
> > Hi,
> > 
> > I've put both variants into the code (in case, it turn out some other
> platform has the bug) .
> > 
> > I've tested and committed the patch.
> > 
> > Regards.
> > 
> > Sat, 22 Jan 2011 20:31:24 -0500 Jean-Claude Beaudoin
> <jean.claude.beaudoin at gmail.com>:
> > 
> >> Hello Ivan,
> >>
> >> How about this here attached?
> >>
> >> No -lm, no _GNU_SOURCE, no glibc version to test for...
> >>
> >> I basically lifted the source code of fegetexcept() and feenableexcept()
> >> directly
> >> from the latest stable Glibc source more or less verbatim with a few
> >> simplifications.
> >>
> >> Seems to work. What do you say?
> >>
> >> Cheers,
> >>
> >> Jean-Claude
> >>
> >>
> >> Ivan Maidanski wrote:
> >>> Hi Jean-Claude,
> >>>
> >>> Some comments follow.
> >>>
> >>> Sat, 22 Jan 2011 01:25:57 -0500 письмо от Jean-Claude Beaudoin
> >> <jean.claude.beaudoin at gmail.com>:
> >>>> Ivan Maidanski wrote:
> >>>>> Hi,
> >>>>>
> >>>>> Some notes about the patch:
> >>>>> 1. LINUX macro should be tested instead if linux;
> >>>> Sure. I kicked that patch out your way a bit too quickly it seems.
> >>>> I did not think enough beyond my own working context when I did it.
> >>>> It probably is not suitable for general/portable use.
> >>>>
> >>>>> 2. IFAIK this requires -lm linker option (alternatively we could load it
> >>>> dynamically to avoid possible changes of makefiles of the client
> >> applications)
> >>>> ;
> >>>>
> >>>> Yes it does require -lm since fegetexcept() and feenableexcept() are both
> >> in
> >>>> that library.
> >>>> The alternative would be inline assembly and I am not fluent enough in
> that
> >> to
> >>>> cook it up
> >>>> quickly. On top of it my app links -lm anyway. But you are right to
> >> consider
> >>>> this a problem
> >>>> in a more general context.
> >>> This is the major problem. There are 3 ways:
> >>> - use assembly if possible (this is preferred but I'm not a guru in it
> >> neither);
> >>> - use dynamic loading;
> >>> - dont define GETCONTEXT_FPU_EXCMASK_BUG at all (in gcconfig.h) but test
> it
> >> in mach_dep.c.
> >>>>> 3. These functions are available only starting from some Glib version
> (the
> >>>> corresponding macro should be tested).
> >>>>
> >>>> The man page seems to indicate that they started their career with Glibc
> >> 2.2
> >>>> which is somewhat
> >>>> ancient from my point of view. As for the macro to test that is way above
> >> my
> >>>> head.
> >>> # if __GLIBC__ == 2 && __GLIBC_MINOR__ >= 2 || __GLIBC__ > 2
> >>>
> >>>>> 4. Should we define _GNU_SOURCE before include fenv.h or not?
> >>>> Yes, define _GNU_SOURCE as you say. My mistake, the man page says to
> define
> >> it
> >>>> and it should be,
> >>>> sorry about that.
> >>> Ok.
> >>>
> >>> Regards.
> >>>
> >>>>> 5. It's better to test GETCONTEXT_FPU_EXCMASK_BUG in mach_dep.c and set
> it
> >>>> in gcconfig.h (please also let me when the bug in glib will be fixed to
> >> adjust
> >>>> gcconfig.h then).
> >>>>
> >>>> Sure. I will keep you posted on the evolution of my bug report but
> jugging
> >>>> from the activity on
> >>>> my bugzilla entry you should not hold you breath, they sure don't seem in
> >> any
> >>>> rush about it...
> >>> Not a problem.
> >>>
> >>>>> Regards.
> >>>>>
> >>>> Cheers.
> >>
> >> 191,194d190
> >> < #if defined(LINUX) && __x86_64__
> >> < #include <fenv.h>
> >> < #endif
> >> < 
> >> 211,239d206
> >> < #if defined(LINUX) && __x86_64__
> >> <       unsigned short int except_mask;
> >> < 
> >> <       __asm__("fstcw %0" : "=m" (*&except_mask));
> >> <       except_mask &= FE_ALL_EXCEPT;
> >> < 
> >> <       if (getcontext(&ctxt) < 0)
> >> <         ABORT ("Getcontext failed: Use another register retrieval
> method?");
> >> < 
> >> <       {
> >> < 	unsigned short int new_exc;
> >> < 	unsigned int new_exc_sse;
> >> < 
> >> < 	/* Get the current control word of the x87 FPU.  */
> >> < 	__asm__ ("fstcw %0" : "=m" (*&new_exc));
> >> < 
> >> < 	new_exc &= except_mask;
> >> < 	__asm__ ("fldcw %0" : : "m" (*&new_exc));
> >> < 
> >> < 	/* And now the same for the SSE MXCSR register.  */
> >> < 	__asm__ ("stmxcsr %0" : "=m" (*&new_exc_sse));
> >> < 
> >> < 	/* The SSE exception masks are shifted by 7 bits.  */
> >> < 	new_exc_sse &= (except_mask << 7);
> >> < 	__asm__ ("ldmxcsr %0" : : "m" (*&new_exc_sse));
> >> <       }
> >> < 
> >> < 
> >> < #else
> >> 242d208
> >> < #endif
> >>
> >> _______________________________________________
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> >> http://www.hpl.hp.com/hosted/linux/mail-archives/gc/
> > 
> > 
> > ------------------------------------------------------------------------
> > 
> > _______________________________________________
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> 
> 
> jean-claude at mars> diff mach_dep.c mach_dep.c.orig 
> 191,194d190
> < #if defined(LINUX) && __x86_64__
> < #define ALL_EXCEPT 0x3f
> < #endif
> < 
> 211,232d206
> < #if defined(LINUX) && __x86_64__
> <       unsigned short int old_fcw;
> < 
> <       __asm__("fstcw %0" : "=m" (*&old_fcw));
> < 
> <       if (getcontext(&ctxt) < 0)
> <         ABORT ("Getcontext failed: Use another register retrieval method?");
> < 
> <       __asm__ ("fldcw %0" : : "m" (*&old_fcw));
> < 
> <       {
> < 	unsigned int old_mxcsr;
> < 	unsigned int new_mxcsr;
> < 	unsigned short int except_mask = old_fcw & ALL_EXCEPT;
> < 
> < 	__asm__ ("stmxcsr %0" : "=m" (*&old_mxcsr));
> < 
> < 	/* The SSE exceptions mask is shifted left by 7 bits.  */
> < 	new_mxcsr = (old_mxcsr & ~(ALL_EXCEPT << 7)) | ((except_mask) << 7);
> < 	__asm__ ("ldmxcsr %0" : : "m" (*&new_mxcsr));
> <       }
> < #else
> 235d208
> < #endif
> 
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