Component and System Level Design-for-Testability Features Implemented in a Family of Workstation Products
Faced with testing over twenty new ASIC components going into four different workstation and multiuser computer models, designers formed a team that developed a common system-level design-for-testability (DFT) architecture so that subsystem parts could be shared without affecting the manufacturing test flow.
by Bulent I. Dervisoglu and Michael Ricchetti
Article 14 - apr95a14.pdf
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