Jianhua (Joshua) Yang

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Principal Research Scientist
Palo Alto

Biography



Principal Research Scientist 
Hewlett-Packard Labs, USA

R&D Researcher 
Huawei Technologies, China

Education:
University of Wisconsin - Madison 
Ph. D , Materials Science Program 
Thesis: Engineering and Characterizing Nanoscale Multilayers for Magnetic Tunnel Junctions

University of Wisconsin - Madison 
Matster, Materials Science Program

Southeast University, Nanjing, China 
B.S. , Materials processing Engineering

Authored and co-authored over 70 papers in academic journals, over 70 papers in international technical conferences and holding 46 granted and over 70 pending US Patents.

 

Research interests

Nanoelectronics, Nanoionics, Nanothermodynamics especailly for non-volatile memory technologies: fabrications, characterizations and applications.

Awards

 

Publications

Selected recent papers:

"J. Joshua Yang" publication list in Google Scholar

Patents

46

Professional activities

Editor:

Book/Journal issue (Ed.):

 
Book chapter:
"Oxide based memristive nanodevices" in book "Emerging Nonvolatile Memories", in press

Symposium Chair:
IEEE Nanotechnology 8th and 10th Annual Symposiums on "Emerging Non-Volatile Memory Technologies" (2012) and “2D Devices and Materials” (2014), respectively Santa Clara, CA, USA


Program/technical committees:

1. Elected Officer, IEEE Nanotechnology Council (SF & Bayarea)


Recent invited talks:
  1. International Conference on Communications, Circuits and Systems (ICCCAS 2009) San Jose, California.
  2. The 7th International Conference on Advanced Materials and Devices (ICAMD 2009), Jeju island, Korea. 
  3. The 10th Non-volatile memory technology symposium (NVMTS 2009), Portland, Oregon. 
  4. International Symposium on Integrated Functionalities ( ISIF 2010), San Juan, Puerto Rico. 
  5. Advances in nonvolatile memory materials and devices (2010), Suzhou, China. 
  6. International Symposium on Materials for Enabling Nanodevices (ISMEN 2010), UCLA, California.(Plenary)
  7. The Frontier of Functional-Oxide Nano Electronics workshop, 2011, Tsukuba, Japan. 
  8. The 11th Non-volatile memory technology symposium (NVMTS 2011), Shanghai, China. (Keynote)
  9. IEEE International Conference on Solid-State and Integrated Circuit Technology, Xi'an, China (2012). 
  10. 12th Non-Volatile Memory Technology Symposium, Singapore, (2012).
  11. Advanced Memory Workshop, NCCAVS Thin Film Users Group, California (2012).
  12. Seminar, 2009, Seoul National University, Korea.
  13. Seminar, 2009, University of California, Santa Cruz, California.
  14. Invited Lecture, May/2009, UCSC-NASA Ames Research Center,California.
  15. Seminar, 2010, Peking University, Beijing, China.
  16. Seminar, 2010, Chinese Academy of Science, Beijing, China.
  17. seminar, 2011, IEEE Computer Society, San Jose California.
  18. Seminar, 2011, IEEE Electronic Device Society, Santa Clara, California.
  19. Seminar, University of Pittsburgh, Pittsburgh, Pennsylvania (2012).
  20. Seminar, Michigan State University, East Lansing, Michigan (2012).
  21. Invited Lecture, Finisar corp. Sunnyvale California (2012).
  22. Seminar, IEEE SINGAPORE REL/CPMT/ED CHAPTER, Singapore (2012).
  23. The 57th  EIPBN, Tennessee (2013).
  24. LASERION 2013 international workshop, Munich, Germany (2013).
  25. 222th Electrochemical Society Meeting, ULSI Process Integration Symposium, California (2013). (Keynote)
  26. Seminar, AirForce Research Lab, Rome, New York (2013). (Chief Scientist Lecture Series)
  27. The IEEE International Symposium on Circuits and Systems (ISCAS), FEST 2014, Melbourne, Australia. (Keynote)
  28. The 29th Symposium on on Microeletronics Technology and Devices, 2014 (SBMICRO 2014, Chip in Aracaju), Aracaju, Brazil.
  29. The AVS 61st International Symposium & Exhibition, 2014, Baltimore, Maryland
  30. MRS Spring meeting 2014, San Francisco, CA