Jichuan Chang
Palo Alto
Biography
Jichuan Chang is a Principal Research Scientist at HP Labs. His research interests are in computer system architecture and memory systems, with a focus on building cost and energy efficient, data centric datacenters. His past research contributions include component-based software reuse, software architecture support for software construction and runtime adaptation, multiprocessor cache coherence and chip multiprocessor caching. His recent contributions leverage emerging technology trends and cross-disciplinary co-designs to improve server efficiency (e.g., low-TCO microBlades, disaggregated memory, and dematerialized datacenter). Dr. Chang received his B.S. and M.S. degrees from Beijing University and his Ph.D. from University of Wisconsin-Madison. He has three papers selected as IEEE Micro's Top Picks.
Research interests
- Computer systems architecture
- Memory systems
- Software architecture
Awards
- Three Micro's Top Picks papers in computer architecture
- IEEE Senior Member
Publications
[ISCA’12] Doe Hyun Yoon, Jichuan Chang, Naveen Muralimanohar, and Parthasarathy Ranganathan. “BOOM: Enabling Mobile Memory Based Low-Power Server DIMMs.” ISCA 2012.
[IEEEMicro’12] Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi and Mattan Erez. “FREE-p: Protecting Non-Volatile Memory against both Hard and Soft Errors.” IEEE Micro’s TopPicks, 2012.
[CF’12] Jichuan Chang, Parthasarathy Ranganathan, David Roberts, Trevor Mudge, Mehul A. Shah, Kevin T. Lim. “A Limits Study of the Benefits from Nanostore-based Future Data Centric System Architectures.” ACM Conference on Computing Frontiers, 2012.
[ASPLOS’12] Jichuan Chang, Justin Meza, Parthasarathy Ranganathan, Amip Shah, Rocky Shih, Cullen Bash, “Totally Green: Evaluating and Designing Servers for Lifecycle Environmental Impact.” ASPLOS, 2012.
[HPCA’12] Kevin Lim, Yoshio Turner, Jose Renato Santos, Alvin AuYoung, Jichuan Chang, Parthasarathy Ranganathan and Thomas Wenisch. “System-level Implications of Disaggregated Memory.” HPCA-18, 2012.
[CAL’12] Justin Meza, Jichuan Chang, HanBin Yoon, Onur Mutlu and Parthasarathy Ranganathan. “Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management.” IEEE TCCA Computer Architecture Letters, Febrary 2012
[IEEEMicro’12] Parthasarathy Ranganathan and Jichuan Chang, “(Re)Designing Data-Centric Data Centers,” IEEE Micro, 2012.
[MICRO’11] Sheng Li, Kevin T. Lim, Paolo Faraboschi, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, System-Level Integrated Server Architectures for Scale-out Datacenters. MICRO-44, 2011. HiPEAC Award Paper.
[HotPower’11] John Byrne, Jichuan Chang, Kevin T. Lim, Laura Ramirez, Parthasarathy Ranganathan, Power-Efficient Networking for Balanced System Designs: Early Experiences with PCIe. HotPower, 2011.
[IEEEComputer’11] Parthasarathy Ranganathan and Jichuan Chang, “Saving the world, one server at a time, together,” IEEE Computer 44(5): 91-93, 2011.
[HPCA’11] Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Partha Ranganathan, Norman P. Jouppi and Mattan Erez. “FREE-p: Protecting Non-Volatile Memory against both Hard and Soft Errors.” HPCA-17, 2011.
[HotPower’10] Jichuan Chang, Justin Meza, Parthasarathy Ranganathan, Amip Shah, Cullen Bash. “Greens server design: beyond operational energy to sustainability”. HotPower, 2010.
[IMECE’10] Justin Meza, Cullen Bash, Jichuan Chang, Parthasarathy Ranganathan, Amip Shah, Rocky Shih. “Sustainability-aware Design of Green Data Centers”. ASME 2010 International Mechanical Engineering Congress & Exposition (IMECE), November, 2010.
[ISCA’09] Kevin Lim, Jichuan Chang, Trevor Mudge, Parthasarathy Ranganathan, Steve Reinhardt, Tom Wenisch. “Disaggregated Memory for Expansion and Sharing in Blade Servers,” ISCA-36, 2009.
[IEEEMicro’09] Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant Patel, Trevor Mudge, Steve Reinhardt, “Server Architectures for the Warehouse-computing Environments,” IEEE Micro’s TopPicks, 2009.
[ISCA’08] Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant Patel, Trevor Mudge, Steve Reinhardt, “Understanding and Designing New System Architectures for Emerging Warehouse-Computing Environments,” ISCA-35, June 2008.
[ICS’07] Jichuan Chang and Guri Sohi, “Cooperative Cache Partitioning for Chip Multiprocessors,” In Proceedings of the 21st ACM International Conference on Supercomputing (ICS’07), Seattle, Washington, June 2007.
[ISCA’06] Jichuan Chang and Guri Sohi, “Cooperative Caching for Chip Multiprocessors,” In Proceedings of the 33rd Annual International Symposium on Computer Architecture, Boston, Massachusetts, June 2006.
[IEEEMicro’04] Jaehyuk Huh, Doug Burger, Jichuan Chang and Guri Sohi, “Speculative Incoherent Cache Protocols,” IEEE Micro 24(6) - Micro's Top Picks, Nov.-Dec. 2004.
[ASPLOS’04] Jaehyuk Huh, Jichuan Chang, Doug Burger and Guri Sohi, “Coherence Decoupling: Making Use of Incoherence,” In 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XI), MA, October 2004.
[CDSA’01] David Garlan, Bradley Schemerl and Jichuan Chang, “Using Gauges for Architectural-based Monitoring and Adaptation,” In Working Conference on Complex and Dynamic Systems Architecture, 2001.
[SciChina’01] Hong Mei, Jichuan Chang, and Fuqing Yang, “Software Component Composition based on ADL and Middleware,” Science in China (F), Vol. 44(2), pp. 136-151, 2001.
[ICS’00] Hong Mei, Jichuan Chang, and Fuqing Yang, “Composing Software Components at Architectural Level,” In the 16th International Conference on Software - Theory and Practice (ICS2000), Beijing, China, 2000.
[AES’00] Jichuan Chang, Keqin Li, Lifeng Guo, Hong Mei and Fuqing Yang, “Representing and Retrieving Reusable Software Components in Jadebird System,” ACTA ELECTRONICA SINICA, Vol.28(8), pp. 20-23, 2000.
[TOOLSAsia’97] Wu Qiong, Chang Jichuan, Mei Hong, and Yang Fuqing, “JBCDL: An Object-Oriented Component Description Language,” In the Proceedings of TOOLS Asia '97, 1997.
[CS-China’99] Chang Jichuan, Mei Hong, “An Introduction to the Asset Library Open Architecture Framework (ALOAF),” Computer Science, Vol. 26, No.5, May 1999, pp. 31-40.
[CS-China’99] Chang Jichuan, Guo Lifeng, Ma Li, “A Survey of the Representation and Retrieval of Reusable Software Components,” Computer Science, Vol. 26, No.5, 1999, pp. 45-50.
[CS-China’99] Guo Lifeng, Guo Yao, Chang Jichuan, “An Introduction to NATO Software Reuse Standards, Computer Science,” Vol. 26, No.5, May 1999, pp. 5-16.
[CCW-China’99] Chang Jichuan, Mei Hong, “Software Component and Software Architecture: Key Issues in Component Based Development,” China Computer World, March 22, 1999.[Wiley] Jichuan Chang, Enric Herrero, Ramon Canal and Gurindar S. Sohi. “Cooperative Caching for Chip Multiprocessors”. In “Cooperative Networking” (Chapter 13), Wiley, October 2011. ISBN: 978-0-470-74915-9.
[Elsevier] Chapter 6 exercise (Warehouse-Scale Computers to Exploit Request-Level and Data-Level Parallelism) in Hennessy and Patterson’s classic textbook “Computer Architecture: A Quantitative Approach” (Ed. 5), Elsevier, September 2011.
[Elsevier] Chapter 5 exercise (Large and Fast: Exploring Memory Hierarchy) in Patterson and Hennessy’s classic textbook “Computer Organization and Design: The Hardware/Software Interface” (Ed. 4), Elsevier, October 2008.
Patents
2
Professional activities
- Reviewer for various computer architecture journals and conferences.
- Workshop organizer: Architectures and Systems for Big Data (ASBD).
- PC member for ICCD, WEED, CGC, ICPP, HiPC, CF, MSPC, ERSS.
- NSF panelist, 2009 and 2010.