The Teramac Custom Computer
The Teramac configurable hardware system
can execute synchronous logic designs of up to one million
gates at one megahertz. A fully configured
Teramac includes half a gigabyte of RAM and hardware
support for large multiported register files. The system
has been built from custom FPGA's packaged in large
multichip modules. A large custom circuit,
consisting of a million gates,
may be compiled onto the hardware
in approximately one hour, without user intervention. The
system is being used for exploration of computer architectures.
Bibliography
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Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Phil Kuekes, Greg Snider,
Teramac -- Configurable Custom Computing,
Proceedings of the 1995 IEEE Symposium on FPGA's for Custom
Computing Machines, pages 32-38.
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R. Amerson and P. Kuekes,
The Design of an Extremely Large MCM-C -- A Case Study,
International Journal of Microcircuits and Electronic Packaging,
Vol. 17, No. 4, pages 377-382.
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G. Snider, P. Kuekes, B. Culbertson, R. Carter, A. Berger, R. Amerson,
The Teramac Configurable Computer Engine,
Proceedings of the 5th International Workshop, Field Programmable Logic,
1995, Oxford, England, pages 44-53.
-
B. Culbertson, R. Amerson, R. Carter, P. Kuekes, G. Snider,
The Teramac configurable custom computer,
Field Programmable Gate Arrays (FPGAs) for Fast Board Development
and Reconfigurable Computing,
John Schewel, Editor, Proc. SPIE 2607, 1995.
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A. de Boer,
Application of large-scale programmable logic for
artery extraction filtering of 3D MRI data,
HP Laboratories Technical Report HPL-95-95,
Hewlett-Packard Laboratories, Palo Alto, CA, August 1995.
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R. Amerson, R. Carter, W. Culbertson, P. Kuekes, G. Snider,
Plasma: An FPGA for Million Gate Systems,
ACM/SIGDA Fourth International Symposium on Field-Programmable Gate Arrays,
February 1996.
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B. Culbertson, R. Amerson, R. Carter, P. Kuekes, G. Snider,
Exploring Architectures for Volume Visualization
on the Teramac Custom Computer,
Proceedings of the 1996 IEEE Symposium on FPGA's for Custom Computing Machines.
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B. Culbertson, R. Amerson, R. Carter, P. Kuekes, G. Snider,
The Teramac Custom Computer: Extending the Limits with Defect Tolerance,
IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems,
November 1996.
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U. Kanus, M. Meisner, W. Strasser, H. Pfister, A. Kaufman,
R. Amerson, R. Carter, B. Culbertson, P. Kuekes, G. Snider,
Cube-4 Implementations on the Teramac Custom Computing Machine,
Proceedings of the 11th Eurographics Hardware Workshop, August
1996, Poitiers, France, pages 133-143.
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B. Culbertson, R. Amerson, R. Carter, P. Kuekes, G. Snider,
Defect Tolerance on the Teramac Custom Computer,
Proceedings of the 1997 IEEE Symposium on FPGA's for Custom Computing Machines,
pp. 116-123.
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J. Heath, P. Kuekes, G. Snider, S. Williams,
A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology,
Science, Vol. 280, 12 June 1998, pp. 1716-1721.
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