|
|
|
|
|
Hewlett
Packard Research Labs
1501 Page Mill Road MS 1177
Palo Alto, California 94304
Phone: (650) 857-2238
Fax: (650)
857-7029
Email:
Partha.ranganathan@hp.com
|
Parthasarathy
Ranganathan
(Partha)
http://www.hpl.hp.com/personal/Partha_Ranganathan/
|
Home
6415
Devonshire Place
San Jose, CA 95129
Phone: (408)-352-5495
Cell phone: (650) 743-6445
Email:
Partha.ranganathan@gmail.com
|
Research
Interests
Computer systems architecture and
management, power management and energy efficiency
Key
projects
·
Data-centric (exascale) datacenters; blades++ (TCO-aware next-generation
blade systems)
·
SmartPower (power-efficient high-performance system, power
modeling)
·
RSIM (system
evaluation & architectures for media and database applications)
Education
Ph.D.,
May 2000, Electrical and Computer Engineering, Rice University
(GPA: 4.03/4.00)
Design of General-Purpose Systems for Emerging Applications
M.S.,
1997, Electrical and Computer Engineering, Rice University
(GPA: 4.03/4.00)
An Evaluation of Memory Consistency Models for Shared-Memory Systems with
ILP Processors
B.Tech., 1994, Electrical
Engineering, Indian Institute of Technology (IIT), Madras (GPA: 9.1/10)
Employment
History
Hewlett Packard Labs/Compaq
Western Research Lab, Palo Alto USA, 2000—current
Distinguished technologist and
research manager, 2008-current
Principal
research scientist and research manager, 2006-2008
Principal
research scientist, 2004-2006
Senior research scientist, 2003-
2004
Research scientist/Member
Technical Staff, 2000- 2003
Hewlett Packard Labs,
Bangalore/HP Systems Technology & Software Division (STSD), Bangalore
Visiting
research scientist, Summer 2008
Visiting research scientist, Summer 2010
Research
Assistant, Rice University, 1995-2000
Research
Intern, Digital Western Research
Laboratory, Summer 1997
Research
Intern, Digital Western Research
Laboratory, Summer 1996
Awards
and Recognition
·
ISCA
Hall of Fame, 2009
·
Several
internal company recognition awards, 2004-current
·
ISCA
2008 paper recognized in IEEE Micro “Top Picks from Computer Architecture
Conferences” (year’s 12 most significant
research publications in computer architecture based on novelty and long term
impact).
·
Rice
University Outstanding Young Engineering Alumnus, 2008, for notable accomplishments as an engineer and contributions to Rice
and the community.
·
Technology
review top 35 young innovators, 2007, who
will create the future by transforming existing industries and establishing new
ones
·
ESSL
Research Leadership Award “for achieving
recognition as a power management expert in the HP internal and external system
architecture community”, December 2006, Awarded to one person at the lab
level
·
IEEE
Senior Member, August 2006, ACM Senior Member, December 2006
·
Hewlett
Packard e-Award, in recognition of
creating a virtual team to overcome international and organizational boundaries
while combining two unique technology areas, namely user interfaces and low
power design for new HP PDA products, April 2004
·
Alumni Acknowledgement Award, Indian Institute of
Technology, Madras,
July 2002
·
Alumni Service Award, IIT Madras
Alumni Association of North America, February
2002
·
Lodeiska Stockbridge Vaughan Fellowship, for
outstanding achievement and promise, 1996-1997
(awarded to one graduate student from all departments in the Rice School of
Engineering.)
·
Rice University Fellowship, 1994-1995
·
Government of India -- Certificate of Merit, 1990
Selected Press Features
(60+ interviews and features, in magazines and
newspapers in North America, South America, Asia, and Europe)
·
“Power efficiency still lags, says HP researcher,” Techworld, April 13, 2010
·
“HP researcher: Power efficiency has a long way to
go”, PCWorld, NetworkWorld,
April 12, 2010
·
HP labs sees the future in a simpler data center”,
hpl.hp.com, April 9 2010
·
“Saving the world, one server at a time”, youtube, March 2010
·
IEEE Computer “Computing Now” podcast, Decebmer 2009
·
“Seeing a fabulous vision of the future,” San Jose
Mercury News, Sep 11, 2009
·
“Pure researchers shift focus to bottom line”, SF
Chronicle, August 31, 2009
·
“A new approach to data center management,” hp.com,
August 2009
·
“Affordable cooling strategies,” Processor
Magazine, August 28, 2009
·
“Fully coordinated”, HPL cover feature; zdnet.com,
April 2009
·
“Innovating in techcon,”,
hpl.hp.com, May 2009
·
HP Labs Annual report, December 2008
·
“HP Labs aims at exascale
computing,” EEtimes, September, 2008
·
Hp.com patent profile (“features the company’s most creative people — the top
inventors, patent holders and engineers – and what inspires them”), August,
2008
·
“Proliferation of devices hinders energy
efficiency,” IndUS BusinessJournal,
March, 2008
·
“HP Looks To Improve Power Management
Coordination“, Slashdot 3/08
·
“Looking at datacenter power of the future,” ComputerWorld, February 08
·
Everyday
Edisons, PBS 2008
·
“Benchmarking
Power-Efficient Servers", Slashdot, 8/21/07
·
“HP researcher achieves victory in power struggle,”
EE times, August 2007
·
“Future stock”, Times of India, September 2007
·
“MIT’s Tech Review Honors Young Energy Stars,”
earth2tech.com
·
“Building an energy efficient home computer,”
blogs.zdnet.com, September 2007
·
“HP's Green Data Center Portfolio Keeps Growing,”
InternetNews.com, 2007
·
Pod-Planet.com, “Advances in power management,”
Podcast interview, August 2007
·
HP Global Citizenship Report, 2006
·
“The heat is off!” – featured in new ideas for
revolutionary technology, MIT Technology Review, July 2005
·
Slashdot
and Tom’s hardware guide, March 2005 (250+ responses)
·
Hp.com, physorg.com, News.PDA Live!, PDAlive.com, davesipaq.com.
March 2005
·
(French)
L’Ordinateur individual, March 2005
·
(Italian)
Se Consumi Ti SpengoSE, WellcomeNews,
March 2005
·
(Swedish) Forskning & Framsteg,
March 2005
·
(Brazilian) A arte
de economizar energia em portáteis, Jornal do Brasil, March
2005
·
(German) Neue Displays verbrauchen
weniger Strom, Welt am Sonntag, January 2005
·
(Dutch)
ArtikelAG, "PDA kan mit minder energy," December 2004
·
“Energy-saving screens,” MIT Technology Revie, December 2004
·
Mobile PC, "Fade
to gray," November 2004
·
Power Electronics Technology, “Smarter Power Management Techniques Promise More Power for Portables,”
September 2004
·
Lead
feature in San Francisco Chronicle Business Section, “HP tests tactics to save
batteries,” September 2004
·
Business
Week, “The Race for Brawnier Batteries,”
June 2004
Research
Contributions
Exascale data centers. I
am the principal investigator for the exascale
datacenter project at HP Labs. This research seeks to create and demonstrate an
end-to-end data center infrastructure solution designed ground-up with total
costs of ownership and manageability in focus. We systematically redesign
individual platform elements as efficient building blocks with their role in
the broader solution in mind, to be used in combination with a powerful
management layer at the datacenter level to dynamically monitor and manage
resources for global efficiency and improved capabilities. Sub-contributions of
the project include (1) disaggregated
shared platforms in dematerialized datacenters, with powerful
hardware-aware resource management co-designed into the virtualization layer,
(2) connected by an end-to-end networking
architecture, spanning vNICs to switches,
providing QoS management over converged fabrics, (3)
with rich management and platform capabilities delivered through a ecosystem of
virtual appliances driven by powerful abstractions for cross-layer communication and coordination.
Power- and
energy-efficiency. My recent research
focuses on designing power- and energy-efficient systems for future computing
environments (from small mobile devices to dense servers in data centers). Some of the contributions of this work
include: Energy-adaptive displays and
energy-aware user interfaces that pioneered the notion of displays that
adapt their energy consumption based on scope of user interest; this improves
display battery usage two-fold to twenty-fold. Heterogeneous multi-core architectures that propose the use of core
diversity in chip multiprocessor to match workload requirements to
architectural power efficiency; this enables two-fold to ten-fold improvements
in processor power. Power-aware blade
architectures that propose the notion of power budget enforcement at the
enclosure level through hardware-software co-ordination to leverage variations
in typical usage patterns; this improves blade power budgets by a factor of
two. Facilities-aware data center
resource provisioning solutions that adapt workload scheduling to optimize
for power and cooling costs in addition to performance; for example,
temperature-aware resource scheduling can reduce annual cooling costs (often
millions of dollars) in large data centers by half. Our work has also developed several new
approaches for power measuring and monitoring, including JouleSort, energy-based statistical profiling, location-aware knowledge planes,
as well as proxy-based environmental
modeling. Using these tools, we have also performed several detailed
studies (often the first such in the literature) of power consumption of real
system deployments, and have influenced industry standards and metrics.
High-performance and
better programmability. My dissertation research focused on
application-optimized architecture designs in response to changes in the
application mix favoring database, media, and communication applications, as
well as improvements to performance, programmability, and simulation of
multiprocessor systems enabled by the emergence of processors that aggressively
leveraged instruction-level parallelism (ILP).
Specific optimizations that emerged out of this work include reconfigurable caches – a design that
enabled on-the-fly reuse of otherwise under-utilized memory resources, SC++ -- an implementation of sequential
consistency that bridged the programmability-performance gap in memory
consistency models, fuzzy and selective
acquires – software-only primitives to reduce synchronization overheads,
and algorithms for producer- and
consumer-initiated prefetching for memory and
coherence overhead. Also, as part of this work, we developed RSIM, the first public simulator that
modeled ILP-based multiprocessors in great detail. RSIM has had more than 2000
unique downloads and has been shown to address large errors otherwise possible
with earlier-generation simulators.
Patents
20 issued
patents; 40+ patents pending. Please see U.S. patents & trademark office
(uspto.gov) for public information.
Keynotes,
Panels, and Tutorials
1.
Green clouds:
the next frontier, National Academy of Engineering,
Frontiers of Engineering, September 2010
2.
Saving the
world, one server at a time, Keynote presentation at
the Workshop on Energy-Efficient Design, held in conjunction with the
International Symposium of Computer Architecture, June 2010
3.
Green clouds,
red walls, and black swans, Keynote presentation at
the International Conference on Autonomic Computing (ICAC), June 2010
4.
Saving the
world, one server at a time, Keynote presentation at
the GreenIT workshop, Georgia Tech, October 2009
5.
Green Clouds and
Black Swans, Keynote presentation at the International Symposium on
Workload Characterization, October 2009
6.
Modeling for the
exascale era: challenges and opportunities, Keynote
presentation at the Workshop on Modeling, Benchmarking, and Simulations (MoBS), held in conjunction with the International Symposium
on Computer Architecture (ISCA), June 2009
7.
Rethinking the
systems stack, Keynote presentation at the Workshop on the Interaction
between Operating Systems and Computer Architecture (WIOSCA), held in
conjunction with the International Symposium on Computer Architecture (ISCA),
June 2009
8.
A Science of
Power Management: a systems perspective, Presentation at
the National Science Foundation Science of Power Workshop, April 2009
9.
The manageability wall in the exascale era: opportunities and challenges, Keynote presentation at the Workshop on managed many-core
systems (MMCS), held in conjunction with the International Symposium on
Architectural Support for Programming Languages and Operating Systems (ASPLOS),
March 2009
10.
Designing servers and datacenters for the exascale computing era, Keynote presentation at the Rice University
Industrial Affiliates Meeting, October 2008
11.
System implications of integrated photonics
(with Norm Jouppi), Keynote
presentation at the International Symposium on Low Power Electronics,
September, 2008
12.
The Innovation Process, with the exascale datacenter as a case study, Keynote presentation at the HP GDIC Innovation
Symposium, August 2008
13. Low-Power PDA displays, Keynote feature presentation at PortablePower
2004
14.
The Power Management Challenge: Getting the Next 100X, Keynote presentation at the 2nd workshop on optimizations
for DSPs and Embedded Systems, 2004
15.
Panel Participation:
o
Cloud
computing opportunities: an infrastructure perspective, HP Techcon,
May 2009
o
Panel
chair, industrial perspectives on architectural challenges, HPCA, February 2009
o
Towards
a zero-carbon footprint for the IT ecosystem: energy-efficient servers and
datacenters, Canada-California Strategic Innovation Partnership Green IT
workshop, 2008
o
Rethinking server design for the ensemble, Gigascale institute workshop, 2008
o
Panel Chair, “Power
management from cores to datacenters: where are we going to get the next 10X?”,
ISLPED 2008
o
Exascale Software Challenges DARPA white paper, July 2008
o
National Science Foundation, Computer systems
panel, April 2008
o
“Energy-efficient Next-Generation Data Centers for
Sustainable Business Outcomes”, HP Press Panel, July 2007
o
National Science Foundation, Computer systems
panel, January 2007
o
National Science Foundation, Computer systems
panel, September 2005
o
Panel – “Important Research Challenges in
Temperature-aware Computer Systems”, TACS, June 2005
o
Panel – “New Products and Applications”, PortablePower 2004
o
National Science Foundation, Computer systems
panel, June 2004
o
National Science Foundation, Computer systems panel,
February 2003
o
Round-table
discussion on ``Limits and Future'', Workshop on Mixing Logic and DRAM: Chips
that Compute and Remember, Denver.
June 1997.
16.
Tutorials
o
Manageability-aware systems design, ISCA 2009
o
Enterprise Power and Cooling: A chip-to-datacenter
perspective, HotChips 2007
o
Enterprise Power and Cooling: A chip-to-datacenter
perspective, ASPLOS 2006
Publications
(copies available from http://www.hpl.hp.com/personal/Partha_Ranganathan)
Under preparation/review
1.
“From
Microprocessors to nanostores: building blocks for
the data-centric future,” Parthasarathy Ranganathan et al, Under review, 2010
2.
‘“On
Network Energy Efficiency for Data Center and Enterprise Networks,” Priya Mahadevan,
Sujata Banerjee, Puneet Sharma, Amip Shah, Parthasarathy Ranganathan, Under
review, 2010
3.
“(Re)Designing
Data-Centric Data Centers,” David Roberts, Jichuan Chang, Parthasarathy
Ranganathan, Mehul Shah and Trevor Mudge, Under review, 2010
4.
“Pegasus:
Coordinated Scheduling for Virtualized Accelerator-based Systems,” Vishakha
Gupta, Karsten Schwan, Niraj Tolia, Vanish Talwar, and Parthasarathy
Ranganathan, Under review, 2010
5.
“sNICh: Efficient Last Hop Networking in the Data Center,”
Kaushik Kumar Ram, Jayaram Mudigonda, Alan L. Cox, Scott Rixner, Parthasarathy
Ranganathan, Jose Renato Santos, Under review, 2010
Reviewed publications
6.
“Datacenter-scale
Computing,” Luiz Barroso and Parthasarathy Ranganathan,” IEEE Micro Special
Issue on Datacenters, to appear, 2010
7.
“Sustainability-aware
Design of Green Datacenters,” Cullen Bash, Jichuan Chang, Justin Meza,
Parthasarathy Ranganathan, Amip Shah, IMECE, 2010
8.
“sNICh: Integrated NIC+Switch for
Superior VM Networking,” Jayaram Mudigonda, Jose Renato Santos, Paul Congdon,
Parthasarathy Ranganathan, Jeff Mogul, (Poster) Proceedings of HP Techcon, May 2010
9.
“Architecting
and Managing Disaggregated Memory in a Polymorphic Infrastructure,” Kevin Lim,
Jichuan Chang, Partha Ranganathan, Jose Renato Santos, Yoshio Turner, Andrew
Wheeler, Proceedings of HP Techcon, May 2010
10.
“Memristor-based
Efficient System Architecturesfor Data-centric Data
Centers,” Jichuan Chang, Parthasarathy Ranganathan, Gilberto Ribeiro, David
Roberts, Mehul A. Shah, John Sontag, Jieming Zhu, Proceedings of HP Techcon, May 2010
11.
“Online
Detection of Utility Cloud Anomalies Using Statistical Metric Distribution,”
Lakshminarayan Choudur, Nigel Cook, Jeff Hilland, Parthasarathy Ranganathan,
Karsten Schwan, Ram Swaminathan, Vanish Talwar, Chengwei Wang, (Poster)
Proceedings of HP Techcon, May 2010
12.
“Data
Dwarfs: Motivating a Coverage Set for Future Large Data Center Workloads,"
Mehul Shah, Parthasarathy Ranganathan, Jichuan Chang, Niraj Tolia, David
Roberts, Trevor Mudge, Workshop on Architectural Considerations in Large
Datacenters (ACLD), June 2010
13.
“Topology-Aware
Resource Allocation for Data-Intensive Workloads”, Gunho Lee, Niraj Tolia,
Parthasarathy Ranganathan, and Randy H. Katz, Proceedings of the 1st ACM
Asia-Pacific Workshop on Systems (ApSys2010), New Delhi, India, August, 2010
14.
“Hypervisor-based
Prototyping of Disaggregated Memory and Benefits of VM Consolidation,” Kevin
Lim, Jichuan Chang, Jose Renato Santos, Yoshio Turner, Trevor Mudge,
Parthasarathy Ranganathan, Steven Reinhardt, Thomas Wenisch, Poster
presentation at ASPLOS 2010
15.
“Workshop
on Power-aware Computing and Systems: Editor’s introduction”, Philip Levis and
Parthasarathy Ranganathan, Operating Systems Review, January 2010
16.
“Cross-layer
power management”, Zhikui Wang and Parthasarathy Ranganathan, book chapter,
Green Computing, to appear 2010
17. “Online Detection of
Utility Cloud Anomalies Using Metric Distributions,” Chengwei Wang, Vanish
Talwar, Karsten Schwan, Parthasarathy Ranganathan, IEEE/IFIP Network Operations
and Management Symposium (NOMS), April 2010 [pdf
]
18.
“Recipe for Efficiency: Principles of
Power-Aware Computing,” Parthasarathy Ranganathan, Communications of the ACM, April 2010 [pdf]
19.
“M-Channels
and M-Brokers: Coordinated Management in Virtualized Systems,” Sanjay Kumar,
Vanish Talwar, Parthasarathy Ranganathan, Ripal Nathuji, Karsten Schwan, Journal on Cluster Computing , 2010 [pdf]
20. “Report of the Science of Power Management
Workshop,” Kirk W. Cameron, Kirk Pruhs, Sandy Irani, Parthasarathy Ranganathan,
David Brooks, http://scipm.cs.vt.edu/SciPM-ReportToNSF-Web.pdf,
April 2009
21.
“Per-Core
Power Gating for Efficient Power Management,” Jacob Leverich, Christos
Kozyrakis, Matteo Monchiero, Parthasarathy Ranganathan, Vanish Talwar, Computer
Architecture Letters, 2009 [pdf]
22.
“Tracking
the Power in an Enterprise Decision Support System,” Justin Meza, Mehul A.
Shah, Parthasarathy Ranganathan, Mike Fitzner, Jay
Veazey, Proceedings of the International
Symposium on Low Power Electronics and Design (ISLPED), August 2009 [pdf]
23.
“Sustainable Data Centers: Enabled by Supply
and Demand Side Management,” Prith Banerjee,
Chandrakant Patel, Cullen Bash, Parthasarathy Ranganathan, Proceedings of the 46th Design Automation Conference (DAC),
July 2009 [pdf]
24.
“Unified
Thermal and Power Management in Server Enclosures,” Niraj Tolia, Zhikui Wang,
Parthasarathy Ranganathan, Cullen Bash, Manish Marwah, and Xiaoyun
Zhu, Proceedings of the ASME/Pacific Rim
Technical Conference and Exhibition (InterPACK '09),
July 2009 [pdf]
25.
“Optimal
Fan Speed Control for Thermal Management of Servers,” Zhikui Wang, Cullen Bash,
Niraj Tolia, Manish Marwah, Xiaoyun Zhu, and
Parthasarathy Ranganathan, Proceedings of
the ASME/Pacific Rim Technical Conference and Exhibition (InterPACK
'09), June 2009 [pdf]
26.
“Disaggregated Memory for Expansion and
Sharing in Blade Servers.” Kevin Lim, Jichuan Chang, Parthasarathy Ranganathan,
Trevor Mudge, Steven K. Reinhardt, Thomas Wenisch. In Proceedings of the 36th Annual International Symposium on Computer
Architecture (ISCA-36), June 2009. [pdf]
27.
“M-Channels
and M-Brokers: Coordinated Management in Virtualized Systems,” Sanjay Kumar,
Vanish Talwar, Parthasarathy Ranganathan, Ripal Nathuji, Karsten Schwan, Proceedings of the Third International
Conference on Autonomic Computing (ICAC), June 2009 [pdf]
28.
“Zephyr:
A Model-based Approach to Optimizing Cooling for Power Efficiency in Blade
Enclosures,” Niraj Tolia et al, Proceedings
of HP Techcon, May 2009 [hp-pdf]
29.
“High
Availability and Data Integrity for Industry Standard Servers On Demand,” John
Byrne et al, Proceedings of HP Techcon, May 2009 [hp-pdf]
30.
“Federated and Coordinated Systems Management
for Scalability and Efficiency," Jeff Autor,
Dwight Barron, Jeff Hilland, Vidhya Kannan, Sandeep
K.S, Sundara Nagarajan, V. Prashanth, Parthasarathy
Ranganathan, Vanish Talwar, Proceedings
of HP Techcon, May 2009 [hp-pdf]
31.
“A Power Benchmarking Framework for Network
Devices,” Priya Mahadevan, Puneet Sharma, Sujata Banerjee, and Parthasarathy
Ranganathan, IFIP International
Conference on Networking, May 2009 [pdf]
32.
"Energy
Aware Network Operations", Priya Mahadevan, Puneet Sharma, Sujata Banerjee
and Parthasarathy Ranganathan. IEEE
Global Internet Symposium (in conjunction with IEEE Infocom), HPL 2008-164,April
2009. [pdf]
33.
"GViM: GPU-accelerated Virtual Machines," Vishakha
Gupta, Ada Gavrilovska, Karsten Schwan, Harshvardhan Kharche,
Niraj Tolia, Vanish Talwar, and Parthasarathy Ranganathan. Proceedings of the 3rd Workshop on System-level Virtualization
for High Performance Computing (HPCVirt 2009),
March 2009 [pdf]
34.
“Detecting and Correcting Transient Errors via
Xen,” John Byrne et al, Xen Summit (North America), February 2009 [pdf]
35.
“Server
Designs for Warehouse-Computing Environments.” Kevin Lim, Parthasarathy
Ranganathan, Jichuan Chang, Chandrakant Patel, Trevor Mudge, Steve Reinhardt. IEEE Micro 29(1), Micro's Top Picks,
January 2009. [pdf]
36.
“Energy Efficiency: The New Holy Grail of Data
Management Systems Research,” Stavros Harizopoulos, Mehul A. Shah,
Parthasarathy Ranganathan, Conference on
Innovative Data Systems Research (CIDR), January 2009 [pdf]
37.
“Power
modeling and measurement,” Parthasarathy Ranganathan, Suzanne Rivoire, Justin
Moore, Advances in Computers, Elsevier,
Book Chapter, 2009 [pdf]
38. “A Comparison of High-Level Full-System Power
Models,” Suzanne Rivoire, Parthasarathy Ranganathan, Christos Kozyrakis, USENIX Workshop on Power Aware Computing and
Systems (HotPower),December 2008 [pdf]
39.
“Delivering Energy Proportionality with Non
Energy Proportional Systems – Optimizations at the Ensemble Layer,” Niraj
Tolia, Zhikui Wang, Manish Marwah, Cullen Bash, Parthasarathy Ranganathan, Xiaoyun Zhu, USENIX
Workshop on Power Aware Computing and Systems (HotPower),December 2008 [pdf]
40.
"Implementing
High-Availability Memory with a Duplication Cache," Nidhi Aggarwal, Norman
Jouppi, Parthasarathy Ranganathan, Jim Smith, Kewal Saluja, Annual
IEEE/ACM International Symposium on Microarchitecture,
December 2008 [pdf]
41.
“M-Channels and M-Brokers: Coordinated
Management in Virtualized Systems,” Sanjay Kumar, Vanish Talwar, Parthasarathy
Ranganathan, Ripal Nathuji, Karsten Schwan, Workshop
on Managed Multi-Core Systems (MMCS),
June 2008 [pdf]
42.
“Feedback
Control Algorithms for Power Management of Servers,” Zhikui Wang, Cliff McCarthy, Xiaoyun Zhu, Parthasarathy Ranganathan, Vanish Talwar, Third International Workshop on Feedback
Control Implementation and Design in Computing Systems and Networks (FeBID), June 2008 [pdf]
43.
“vManage: Coordinated Management in Virtualized Systems,”
Sanjay Kumar, Vanish Talwar, Parthasarathy Ranganathan, Karsten Schwan, Third Workshop on Hot Topics in Autonomic
Computing (HotAC), April 2008 [pdf]
44.
“Coevolution of Operating Systems and Asymmetric Single-ISA
CMPs,” Nathan Binkert, Jeffrey C. Mogul, Jayaram Mudigonda, Parthasarathy
Ranganathan, Vanish Talwar, IEEE Micro,
2008 [pdf]
45.
"Microblades and Megaservers: Server Architectures for
Emerging Warehouse-Computing Environments,", Reza Bacchus, Jichuan Chang, Tom Flynn, Kevin Lim, Chandrakant Patel, Parthasarathy
Ranganathan, Robert Van Cleve, Proceedings
of Techcon, May 2008 [hp-pdf]
46.
Understanding
and Designing New Server Architectures for Emerging Warehouse-Computing
Environments, Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant
Patel, Trevor Mudge, Steve Reinhardt, Proceedings
of the International Conference on Computer Architecture (ISCA), June 2008 [pdf]
47.
Active
Storage Revisited: The Case for Power and Performance Benefits for Unstructured
Data Processing Applications , Clint Smullen, Shahrukh Tarapore, Sudhanva
Gurumurthi, Parthasarathy Ranganathan, Mustafa Uysal,
ACM Computing Frontiers , May, 2008 [pdf]
48.
Reducing
Overhead for Soft Error Coverage in High Availability Systems. Nidhi Aggarwal,
Norman P. Jouppi, Parthasarathy Ranganathan, James E. Smith, Kewal K. Saluja. Proceedings
of the 4th Workshop on Silicon Errors in Logic System Effects (SELSE-4),
March 2008. [pdf]
49.
No
Power Struggles: A Unified Multi-level Power Management Architecture for the
Data Center, Ramya Raghavendra, Parthasarathy Ranganathan, Vanish Talwar,
Zhikui Wang, and Xiaoyun Zhu, Proceedings of the International Conference
on Architectural Support for Programming Languages and Operating Systems
(ASPLOS), March 2008 [pdf]
50.
“Fabric
convergence and implications for next-generation blade servers”, Kevin Leigh, Parthasarathy Ranganathan, Jaspal Subhlok, Proceedings of the International Conference
on High-Performance Computer Architecture (HPCA), February 2008 [pdf]
51. Modeling
and Metrology Challenges for Enterprise Power Management , Suzanne Rivoire,
Mehul Shah, Parthasarathy Ranganathan, Christos Kozyrakis, Justin Meza, IEEE Computer, vol
40, no 12, pp 39—48, December 2007 [pdf]
52.
Cost-aware
Scheduling for Heterogeneous Enterprise Machines (CASH’EM),” Jennifer Burge,
Parthasarathy Ranganathan, Janet L. Wiener, GreenCom, September 2007 [pdf]
53.
“Isolation
in Commodity Multicore Processors,” Nidhi
Aggarwal, Parthasarathy Ranganathan,
Norman P. Jouppi, James E. Smith, IEEE Computer, June 2007 (cover feature) [pdf]
54.
“JouleSort: A Balanced Energy-Efficiency Benchmark,” Suzanne
Rivoire, Mehul Shah, Parthasarathy Ranganathan, Christos Kozyrakis, Proceedings of the 2007 ACM SIGMOD
International Conference on Management of Data (SIGMOD), June 2007 [pdf]
55.
“Configurable
Isolation: Building High Availability Systems with Commodity Multi-Core
Processors,“ Nidhi Aggarwal, Parthasarathy Ranganathan, Norman Jouppi, James
Smith, Proceedings of the International
Symposium on Computer Architecture (ISCA), June 2007 [pdf]
56.
"Motivating
Commodity Multi-Core Processor Designs for System-level Error Protection,"
Nidhi Aggarwal, Parthasarthy Ranganathan, Norman P.
Jouppi, James E. Smith, George Krejcki, and Kewal K. Saluja, Proceedings of the 2007 IEEE Workshop on Silicon
Errors in Logic - System Effects, April 2007 [pdf]
57.
“No Power Struggles: A Unified Power
Management Architecture for the Data Center,” Ramya Raghavendra, Parthasarathy
Ranganathan, Xiaoyun Zhu, and Zhikui Wang, Proceedings of HP Techcon,
April 2007 [hp-pdf]
58.
“General-Purpose Blade Infrastructure for
Configurable System Architectures,” Kevin Leigh, Parthasarathy Ranganathan, Jaspal Subhlok, Journal on Parallel and Distributed
Databases (JPDD), Springer Publishers 0926-8782 (Print) 1573-7578 , March
2007 [pdf]
(Also available as HPL Tech Report)
59.
"Simulating
Complex Enterprise Workloads using Utilization Traces," Parthasarathy
Ranganathan and Philip Leech, Tenth
Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW),
held with HPCA-13, February 2007 [pdf]
60. “Full-system
Power Analysis and Modeling for Server Environments,” Dimitris
Economous, Suzanne Rivoire, Christos Kozyrakis, and
Parthasarathy Ranganathan, Workshop on
Modeling, Benchmarking, and Simulation (MoBS),
June 2006 [pdf]
61.
“Ensemble-level
Power Management for Dense Blade Servers,” Parthasarathy Ranganathan, Phil
Leech, David Irwin, and Jeff Chase, Proceedings
of the International Symposium on Computer Architecture (ISCA), June 2006 [pdf]
62.
“ConSil: Low-cost Thermal Mapping of Data Centers,” Justin
Moore, Jeff Chase, and Parthasarathy Ranganathan. First Workshop on Tackling Computer Systems Problems with Machine
Learning Techniques (SysML), June, 2006 [pdf]
63.
“Weatherman:
Automated, Online, and Predictive Thermal Mapping and Management for Data
Centers,” Justin Moore, Jeff Chase, and Parthasarathy Ranganathan, Proceedings of the Third International
Conference on Autonomic Computing (ICAC), June 2006 [pdf]
64.
“PowerBalancing for Future-generation Blades,” Hernan
Laffitte, Phil Leech, Parthasarathy Ranganathan, Charlie Shaver, Khaldoun Alzien, Proceedings of HP Techcon,
April 2006 [hp-pdf]
65.
“Energy-aware
user interfaces and energy-adaptive displays,” Parthasarathy Ranganathan, Erik Geelhoed, Meera Manahan, and Ken
Nicholas, IEEE Computer, March 2006 (cover feature) [pdf]
66.
“IT
Infrastructure in Emerging Markets: Arguing for an End-to-end Perspective,”
Ajay Gupta, Parthasarathy Ranganathan, Prashant Sarin,
and Mehul Shah, IEEE Pervasive, April
2006 (cover feature) [pdf]
67. “Heterogeneous
chip multiprocessors,” Rakesh Kumar, Dean Tullsen, Norman Jouppi, Parthasarathy
Ranganathan, IEEE Computer, November
2005 (cover feature) [pdf]
68.
“Dense
and smart: Hardware-software co-ordination for blade server power reduction,”
Parthasarathy Ranganathan et al, Proceedings
of HP TechCon, March 2005. [hp-pdf]
69.
“Making
Scheduling Cool: Temperature-aware Resource Scheduling,” Justin Moore, Jeff
Chase, Parthasarathy Ranganathan, Ratnesh Sharma. Proceedings of the 2005 Annual Usenix
Conference (USENIX2005), April 2005. [pdf]
A shorter version appears as a poster in HP TechCon,
March 2005 [hp-pdf]
70.
“Enterprise
IT trends and implications on system architecture research,” Parthasarathy
Ranganathan and Norman Jouppi, Proceedings
of the International Conference on High-Performance Computer Architecture
(HPCA), 2005 [pdf]
71.
“Data
Center Workload Monitoring, Analysis, and Emulation,” Justin Moore, Jeff Chase, Keith Farkas, and Parthasarathy
Ranganathan. In the Eighth Workshop on
Computer Architecture Evaluation using Commercial Workloads (CAECW),
February, 2005. (Invited paper) [pdf]
72. “Going
Beyond CPUs: The Potential of Temperature-Aware Data Center Architectures,” Justin Moore, Ratnesh Sharma, Rocky Shih,
Jeff Chase, Chandrakant Patel, and Parthasarathy Ranganathan. In the First Workshop on Temperature-Aware Computer
Systems (TACS), June 2004. [pdf]
73.
Investigating
the Relationship Between Battery Life and User Acceptance of Dynamic,
Energy-Aware Interfaces on Handhelds, Lance Bloom, Rachel Harter, Erik Geelhoed, Meera Manahan, and
Parthasarathy Ranganathan, Proceedings of
MobileHCI 2004, March 2004 [pdf]
74.
Energy-adaptive
Displays and Energy-aware User Interfaces, Parthasarathy Ranganathan, Erik Geelhoed, Meera Manahan, and Ken
Nicholas, Proceedings of HP TechCon, June 2004 [Video presentation] [hp-pdf]
75.
Design
Principles for Energy-aware Displays on OLED-based Systems, Sander Vroegindeweij, Rachel Harter, Erik Geelhoed,
and Parthasarathy Ranganathan, Second
International Conference on Appliance Design (2AD), May 2004 [pdf]
76. Single-ISA
Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance,, Rakesh Kumar, Keith Farkas,
Norm P. Jouppi, Parthasarathy Ranganathan, and Dean M. Tullsen, Proceedings of the International Symposium
on Computer Architecture (ISCA), June 2004 [pdf]
77.
Energy-aware
User Interfaces: An Evaluation of User Acceptance, Tim Harter, Sander Vroegindeweij, Erik Geelhoed, Meera Manahan, and Parthasarathy Ranganathan, Proceedings of Conference on Human Factors
in Computing Systems (CHI), April 2004 [pdf]
78.
Single-ISA
Heterogeneous Multi-Core Architectures: The Potential for Processor Power
Reduction. Rakesh Kumar, Dean Tullsen, Parthasarathy Ranganathan, and Keith
Farkas, In Proceedings of the 36th
Annual International Conference on Microarchitecture
(MICRO), December 2003 [pdf]
79.
Energy
consumption in mobile devices: Why Future Systems Need Requirements-Aware
Energy Scale-Down, Robert Mayo and Parthasarathy Ranganathan, Lecture Notes
in Computer Science (LCNS), special issue on power management, 2003. [pdf] (A preliminary version of this
paper appeared in the Proceedings of the Workshop on Power Aware Computing
Systems (PACS), December 2003 [pdf], and as Hewlett Packard
Technical Report HPL 2003-167)
80.
A
Multi-Core Approach to Addressing the Energy-Complexity Problem in
Microprocessors, Rakesh Kumar, Keith Farkas, Norm P. Jouppi, Parthasarathy
Ranganathan, and Dean M. Tullsen, In 2003
Workshop on Complexity-Effective Design, June, 2003. [pdf]
81.
Processor
Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures, Rakesh
Kumar, Keith Farkas, Norm P. Jouppi, Parthasarathy Ranganathan, and Dean M.
Tullsen, Computer Architecture Letters,
Volume 2, Apr. 2003 [pdf]
82.
Smart
Data Center, Chandrakant Patel et al., Proceedings
of HP TechCon, April 2003 [hp-pdf]
83.
Energy-Adaptive
Display System Design for Future Mobile Environments, Subu Iyer, Annie Luo, Robert N. Mayo and Parthasarathy Ranganathan. Proceedings
of the First International Conference on Mobile Systems, Applications, and
Services, May 2003. [pdf] Also available as HPL-TR 2003-91
84.
Energy-driven
Statistical Profiling: Detecting Software Hotspots, Fay Chang, Keith Farkas,
and Parthasarathy Ranganathan, Lecture Notes in Computer Science,
special issue on power management, 2002. [pdf] (A preliminary version of this
paper appeared in the Proceedings of the Workshop on Power Aware Computing
Systems (PACS), February 2002. [pdf])
85.
RSIM:
Simulating Shared-Memory Multiprocessors with ILP Processors, C. J. Hughes, V.
S. Pai, P. Ranganathan, and S. V. Adve, IEEE
Computer, vol. 29, no. 12, special issue on high performance simulators,
February 2002, 40-49 [pdf]
86.
Reconfigurable
Cache and their Application to Media Processing, Parthasarathy
Ranganathan, Sarita Adve, and Norman P. Jouppi, Proceedings of the 27th
International Symposium on Computer Architecture (ISCA-27), June 2000. [pdf]
87.
Performance
of Image and Video Processing with General-Purpose Processors and Media ISA
Extensions , Parthasarathy Ranganathan, Sarita Adve, and Norman P.
Jouppi, Proceedings of the 26th International Symposium on Computer
Architecture (ISCA-26), May 1999. [pdf]
88.
The
Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors , Vijay. S. Pai,
Parthasarathy Ranganathan, Hazim Abdel-Shafi, and Sarita Adve, IEEE Transactions on
Computers (TOC), special issue on caches, February 1999, 218-226. [pdf]
89.
Recent
Advances in Memory Consistency Models for Hardware Shared-Memory Systems,
Sarita Adve, Vijay S. Pai, and Parthasarathy
Ranganathan, Proceedings of the IEEE, special issue on distributed
shared-memory, March 1999, 445-455. (Was featured on IEEE front page.) [pdf]
90.
The
Relative Importance of Memory Latency, Bandwidth, and Branch Limits to
Performance, Norman P. Jouppi and Parthasarathy Ranganathan, Proceedings of the Workshop on Mixing Logic
and DRAM: Chips that Compute and Remember. June 1997. [pdf] An extended version with
additional data appears as “Exploiting Performance Limits to Future
Instruction-level Parallel Processors,” Parthasarathy Ranganathan, Norman P.
Jouppi and Keith Farkas, Compaq WRL TR June 1998. [pdf]
91.
Performance
of Database Workloads on Shared-Memory Systems with Out-of-Order Processors,
Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, and Luiz A.
Barroso, Proceedings of the 8th International Conference on Architectural
Support for Programming Languages and Operating Systems (ASPLOS-VIII),October
1998, 307-318. Also presented at the Seventh Workshop on Shared-Memory
Multiprocessors, June 1998. [pdf]
92.
Using
Speculative Retirement and Larger Instruction Windows to Narrow the Performance
Gap between Memory Consistency Models , Parthasarathy Ranganathan, Vijay S. Pai, and Sarita V. Adve, Proceedings of the 9th Annual
ACM Symposium on Parallel Algorithms and Architectures (SPAA-9), June 1997,
199-210. [pdf]
93.
The
Interaction of Software Prefetching with ILP
Processors in Shared-Memory Systems, Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, and Sarita V. Adve, Proceedings of the 24th
International Symposium on Computer Architecture (ISCA-24), June 1997,
144-156. [pdf]
94.
RSIM:
An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors, Vijay S. Pai,
Parthasarathy Ranganathan, and Sarita V. Adve, IEEE Technical Committee on Computer Architecture newsletter, Fall
1997. [pdf] An earlier version of this
paper appeared in the Proceedings of the 3rd Workshop on Computer Architecture
Education (held in conjunction with the 3rd International Symposium on High
Performance Computer Architecture), February 1997.
95.
The
Impact of Instruction-Level Parallelism on Multiprocessor Performance and
Simulation Methodolgy, Vijay S. Pai,
Parthasarathy Ranganathan, and Sarita V. Adve, Proceedings of the 3rd
International Symposium on High Performance Computer Architecture (HPCA-3),
February 1997, 72-83. Also presented at the Sixth Workshop on Shared-Memory
Multiprocessors, October 5 1996. [pdf]
96.
An
Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP
Processors, Vijay S. Pai, Parthasarathy Ranganathan,
Sarita V. Adve, and Tracy Harton, Proceedings of
the 7th International Conference on Architectural Support for Programming
Languages and Operating Systems (ASPLOS-VII), October 1996, 12-23. [pdf]
Other publications
97.
“Data
Integrity on Commodity Systems in the Face of Transient Hardware Errors,” John
Byrne, Norman Jouppi, Parthasarathy Ranganathan, Laura Ramirez, Bruce Walker,
HP Tech Report, 2010
98.
Software
To Identify Display Resizing And Adapt Screen Content, Alison Chaiken, Parthasarathy
Ranganathan, Alan McReynolds, Research Disclosure Electronic, May 2009 [pdf]
99.
“MagiXen: Combining Binary Translation and Virtualization,”
Matthew Chapman, Daniel J. Magenheimer, Parthasarathy Ranganathan, Hewlett
Packard Technical Report TR2007-85, 2007 [pdf]
100. From
Cores to Systems: Challenges and Opportunities for Multi-Core Research, Norman
Jouppi and Parthasarathy Ranganathan, Microsoft
Multicore Workshop, January 2007 [pdf]
101. A
Sense of Place: Towards a Location-aware Information Plane for Data Centers,
Justin Moore, Jeff Chase, Keith Farkas and Parthasarathy Ranganathan, Hewlett Packard Technical Report TR2004-27. [pdf]
102. Idle
Mode Power Management for Personal Wireless Devices, Nevine Abou-Ghazala,
Robert Mayo, and Parthasarathy Ranganathan. Hewlett
Packard Technical Report HPL 2003-102, 2003 [pdf]
103.
Managing
Power and Heat as First-Class Resources in Enterprise IT environments: The SmartPower Proposition, Keith Farkas and Parthasarathy
Ranganathan, HP-confidential tech report,
December 2003 [hpl-pdf]
104. The
Power of Less Power: Benefits from a Power Management Virtual Team Across HP,
Partha Ranganathan (HPL), Christian Belady
(HP-Superdome), Heather Bean (HP-Digital Camera), Steve Chen (HP-laptop), Kevin
Leigh (HP-blade), Sam Naffziger (HP-IA64), Ken
Nicholas (HP-iPAQ), HP confidential tech report, June 2003 [hp-pdf]
105.
Understanding the Importance of Power and Cooling
Solutions in Data Centers: A Working Document, Parthasarathy Ranganathan et
al., Hewlett Packard Technical Report
HPL-2003-79, April 2003 [hp-pdf]
106. Detecting
Energy Hot Spots: Experiences with the iPAQ PocketPC, Fay Chang, Keith Farkas, and Parthasarathy Ranganathan, Compaq Western Research Laboratory Technical
Note, TN62, http://wera.hpl.hp.com/wrl/techreports/abstracts/2002.1.html,
April 2002 [pdf]
107. HTTP
Features for conserving energy in wireless devices, Eduardo Pinheiro,
Keith Farkas, Jeff Mogul, and Parthasarathy Ranganathan, Presented at “Work in Progress” session at Symposium on Operating
System Principles, October 2001[pdf]
108. General-purpose
Architectures for Media Processing and Database Applications, Parthasarathy
Ranganathan, Ph.D. Thesis, Department
of Electrical and Computer Engineering, Rice University, August 2000 [pdf]
109. An
Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP
Processors, Parthasarathy
Ranganathan, Master's thesis,
Department of Electrical and Computer Engineering, Rice University. April 1997.
[pdf]
110. RSIM
Reference Manual Version 1.0 , Vijay S. Pai, Parthasarathy Ranganathan, and Sarita V. Adve, Technical Report 9705, Department of
Electrical and Computer Engineering, Rice University, August 1997. [pdf]
Software
Distributed and Supported (available from http://www.ece.rice.edu/~rsim)
V. S. Pai, P. Ranganathan, and S. V.
Adve, RSIM (Rice Simulator for ILP Multiprocessors), Version 1.0, August 1997.
RSIM is currently the only publicly-distributed software for simulating
shared-memory multiprocessors with state-of-the-art instruction-level-parallel (ILP)
processors, with over 2000 licenses worldwide. RSIM contains more than 51,000
lines of C++ code spread over 120 files.
Other
External Presentations
1.
Data-centric
data centers
-- AMD, Genetech. Morgan
Stanley, MPO
2.
Saving
the world, one server at a time
-- Michigan, UCLA, USC, Sonoma State, Stanford, 2010
3.
Exascale datacenters
-- HPL India, HP STSD Distinguished Speaker Symposium
2008, BSNL, Microsoft research,
HPL
China, Yahoo research India, IBM India, MPO 2009
4.
Power
Management: getting the next 10X
--
Intel India, TCS India, Tata CRL, IISc, IIT Madras, 2008 Qualcomm labs, 2009
5.
No
Power Struggles: Multi-level Federated Power Management for the Data Center
--
ASPLOS 2008, CiscoGreenResearch
Symposium 2008, IISC 2008
6.
Enterprise
Power and Cooling,
--
ASPLOS 2006 Tutorial. Hotchips
2007 Tutorial
7.
Power
management from handhelds to data centers: Chasing the next 10X.
--
HPL India, June 2005, University of Wisconsin Madison, June 2005, University of
Illinois at Urbana-Champaign, June 2005, University of Houston, August 2006,
Microsoft Research, September 2006, University of Berkeley, October 2006
8.
Enterprise
Power Management.
--
HP, July 2005, Rice University, March 2005, NonStop
Division, March 2006
9.
SmartPower: Power Management and Operations Automation for
the Enterprise.
--
The 3rd meeting of Critical Facilities Round Table Group, September
2003
10.
Energy
consumption in mobile devices: Why Future Systems Need Requirements-Aware
Energy Scale-Down.
--
Docomo Labs, April
2004 ; Stanford University, December 2003 ; Workshop on Power-aware
Computing Systems, December 2003; University of Texas at Austin, October 2003;
Rice University, October 2003; HP Personal Systems Group colloquium, October
2003; External Computer Systems Colloquium, Hewlett Packard Labs, August 2003;
Microsoft Research Labs, July 2003; iPAQ
summit, HP Labs, Palo Alto, September 2002
11.
Energy-driven
Statistical Profiling: Detecting Software Hotspots.
-- Workshop on Power-aware Computing Systems, February 2002
12.
General-Purpose
Architectures for Media Processing.
-- University of Texas at Austin, November 2000
13.
Reconfigurable
Caches and their Application to Media Processing Applications.
-- 27th International Symposium on Computer Architecture (ISCA-27), Vancouver.
June 2000.
14.
General-Purpose
Architectures for Media Processing Applications.
--
Computer Systems Lab, Stanford University, May 2000, College of Computing,
Georgia Institute of Technology, May 2000, Department of Electrical and
Computer Engineering, Duke University, April 2000, Department of Computer
Science, University of California at San Diego, April 2000, Department of
Electrical and Computer Science, University of Michigan, April 2000, Department
of Electrical and Computer Engineering, Purdue University, April 2000,
Microsoft Research, April 2000, Department of Electrical and Computer
Engineering, Cornell University, March 2000, Department of Electrical and
Computer Engineering, Carnegie Mellon University, March 2000, Computer Systems
Lab, Rice University, March 2000, Compaq Western Research Labs, March 2000,
Compaq Cambridge Research Labs, March 2000, Departments of Electrical ECE and
CS, University of Massachussets at Amherst, March
2000, Compaq VSSAD Alpha Development Group, March 2000, Computer Systems Lab,
University of Rochester, February 2000, Hewlett Packard Research Labs, February
2000, Intel Microprocessor Research Labs, February 2000, Indian Institute of
Technology (IIT), Madras. November 1999, Indian Institute of
Sciences (IISc), Bangalore. November
1999, IBM India Research Lab, New Delhi. November 1999.
15.
Performance
of Image and Video Processing with General-Purpose Processors and Media ISA
Extensions.
-- 26th International Symposium on Computer Architecture (ISCA-26), Atlanta.
May 1999.
16.
Performance
of Database Workloads on Shared-Memory Systems with Out-of-Order Processors.
-- 8th International Conference on Architectural Support for Programming
Languages and Operating Systems (ASPLOS-VIII), San Jose. October 1998; 7th
Workshop on Shared-Memory Multiprocessors (with ISCA-25), Barcelona. June 1998.
17.
Interaction
of Software Prefetching with ILP Processors in
Shared-Memory Systems.
--24th International Symposium on Computer Architecture (ISCA-24), Denver. June
1997.
18.
The
Relative Importance of Memory Latency, Bandwidth, and Branch Limits to Performance.
-- Workshop on Mixing Logic and DRAM: Chips that Compute and Remember, Denver.
June 1997.
19.
The
Impact of Instruction-Level Parallelism on Multiprocessor Performance and
Simulation Methodology.
-- 6th Workshop on Shared-Memory Multiprocessors (with ASPLOS-VII), Boston.
October 1996.
Other
Professional Activities
·
HPLB
Lab Director Search Committee, 2008; HPL Strategic planning committee member,
2007; Advisory Board Observer, 2008
·
EPA
Power Summit on Energy Efficiency in Servers, February 2006
·
Chair,
company-wide virtual community on power management within Hewlett Packard, 2005
·
Chair,
birds-of-a-feather session on power management, HP TechCon2003
·
Conference
organization
- Guest
co-editor, IEEE Micro, Special Issue on Datacenters, 2010
- Co-Program
chair, HotPower, 2009
- Special
session chair, International Symposium on Low Power Electronics Devices
(ISLPED), 2009
- Steering
committee, Science of Power Management NSF Workshop, 2009
- Program
chair, Industrial Session, High Performance Computer Architecture (HPCA),
2009
- Panels
Chair, International Symposium on Low Power Electronics Devices (ISLPED),
2008
- Program
co-chair, HP Power Summit, 2005
- Finance
chair, ASPLOS 2002
·
Program
committee
- Steering
committee, Architectural considerations for large datacenters (ACLD),
2010
- Program
committee, Workshop on Interaction of Operating Systems and Computer
Architecture, 2010
- Program
committee, International Conference on High Performance Computing (HiPC), 2010
- Program
committee, International Conference on Green Computing, 2010
- Program
committee, Exascale Evaluation and Research
Techniques Workshop, 2010
- External
review committee, International Symposium on Computer Architecture
(ISCA), 2010
- External
review committee, Conference on Architectural Support for Programming
Languages and Operating Systems (ASPLOS), 2010
- Editorial
board, ACM Transactions on Design Automation of Electronic Systems (ToDAES), 2009-2012
- Steering
committee, Architectural considerations for large datacenters (ACLD),
2009
- Program
committee, High Performance Computer Architecture (HPCA), 2010
- Program
committee, International Conference on High Performance Computing (HiPC), 2009
- Program
committee, International Symposium on Microarchitecture
(MICRO), 2009
- Program
committee, Workshop on Automated Control for Datacenters and Clouds
(ACDC), 2009
- Program
committee, International Symposium on Computer Architecture (ISCA), 2009
- Program
committee, High Performance Computer Architecture (HPCA), 2009,
- Program
committee, Workshop on Power Aware Computing and Systems (HotPower '08),
2008
- Program
committee, Workshop on the Interaction between Operating System and
Computer Architecture (WIOSCA), 2008
- Program
committee, International Symposium on Workload Characterization (IISWC),
2008
- Program
committee, International Conference on High Performance Computing (HiPC), 2008
- Program
committee, Top Picks in Computer Architecture IEE Micro, 2007
- Program
committee, GreenCom workshop, 2007
- Program
committee, International Conference on High Performance Computing (HiPC), 2007
- Program
committee, International Symposium on Computer Architecture (ISCA), 2007
- Program
committee, ACM International Conference on Computing Frontiers, 2007
- Program
committee, Enterprises Computing and Systems Research (ECSR) Workshop,
2006
- Program
committee, Conference on Parallel Architectures and Compilation
Techniques (PACT), 2006
- Program
committee, International Conference on Parallel and Distributed Systems
(ICPDS), 2006
- Program
committee, Power-aware computing systems (PACS) 2004
- Program
committee, International Conference on High Performance Computing (HiPC), 2004
- Program
committee, International Conference on Parallel Processing (ICPP) 2003
·
Teaching
- HP
Engineering seminar, “Exascale-era datacenter
design”
- Guest
lectures on power, UCLA, 2010, Stanford, 2010
- Contributing
author, Computer Organization and Design: the hardware/software
interface, D.A. Patterson and J.L. Hennessy, Fourth edition, Morgan
Kaufmann, 2009
- Manageability-aware
systems design, ISCA 2009
- Enterprise
Power and Cooling: A chip-to-datacenter perspective, HotChips
2007 Tutorial
- Enterprise
Power and Cooling: A chip-to-datacenter perspective, ASPLOS 2006 Tutorial
- HP Virtual
class room: Enterprise Power Architectures, June 2005
- Guest
lectures on power, EE282, Stanford University, February 2004, November
2004, NPS, Monterey, December 2004, December 2008
- Short
course on “Architectures for Media Processing,” Indian Institute of
Technology, Madras, June 2002
- Co-teaching
of Computer Architecture and Organization (EE282) with Marc Tremblay and
Andrew Wolfe, Stanford University, Autumn 2001/2002
- Development
of exercises for “Computer Architecture: A Quantitative Approach” by
Hennessey and Patterson, September 2001
- Recitation
instructor for Computer Systems Architecture, Rice University, Fall 1999.
- Teaching
assistant for six semesters, Rice University, 1994-1999.
- Tutor,
Literacy Mission, Madras, India, 1993-1994.
- Co-developed
Generalized Tutorial
Package, a software package used at the Center for Education,
IIT, Madras.
·
Mentoring
o
Summer
interns
Steven
Pelley (Michigan), Iulian Moraru (CMU), Shivaram Venkatraman
(UIUC), Doe Hyun Hoon (UT Austin), Justin Meza, Tobin
Gonzalez (UWashington), Chengwei Wang (Gtech), Summer 2010 David Roberts (Michigan), Gunho Lee
(Berkeley), Summer 2009, Vishaka Gupta (Georgia
Tech), Summer 2008, Kevin Lim (University of Michigan), Sanjay Kumar (Georgia
tech), Justin Meza (UCLA), Summer 2008, 2007, Jen Burge (Duke University),
Summer 2006, Ramya Raghavendra (UCSB), Summer 2006, Nidhi Aggarwal (Wisconsin),
Summer 2006, Summer 2007, Suzanne Rivoire (Stanford University), Summer 2005; Lykomidis Mastraleon (Stanford
University), Winter 2004; Dimitris Economou (Stanford University), Summer 2004-; David Irwin
(Duke University), Spring/Summer 2004; Justin Moore (Duke University), Summer
2003, Summer 2004; Sander Vroegindeweij, Summer 2003;
Neven Abou-Ghazala (University
of Pittsburg), Summer 2002; Rakesh Kumar (University of San Diego), Summer
2002-; Annie Luo (Carnegie Mellon University), Summer
2002; Eduardo Pinheiro (Rutgers University), Summer
2001; Aamer Jaleel
(University of Maryland), Summer 2001
o Thesis
committee & advising:
o Justin
Moore (Duke University, Phd 2005)
o Kevin
Leigh (University of Houston, Phd 2007)
o David
Irwin (Duke University, Phd 2007)
o Suzanne
Rivoire (Stanford University, Phd, 2008)
o Sanjay
Kumar (Georgia Tech, Phd, 2008)
o Nidhi
Aggarwal (University of Wisconsin-Madison, Phd, 2008)
o Kevin
Lim (Michigan, Phd, 2010)
o Direct
reports
o Vanish
Talwar, Jichuan Chang, Niraj Tolia, Jayaram Mudigonda, Renato Santos, Yoshio
Turner, Matteo Monchiero
·
Reviewer
for
HiPeaC, Morgan Kauffman book review, IEEE Computer, Journal
of Parallel and Distributed Computing, Transactions on Computers, ACM
Transactions on Programming Languages and Systems, Transactions on Parallel and
Distributed Systems (03,02), International Symposium on Computer Architecture
(ISCA), International Symposium on Microarchitecture,
International Conference on Architectural Support for Programming Languages and
Operating Systems (ASPLOS), International Symposium on High Performance
Computer Architecture, International Conference on Parallel Processing,
International Symposium on Parallel Algorithms and Architectures, International
Conference on Supercomputing, Conference on Parallel Architectures and
Compilation Techniques (PACT), EUROPAR Conference, International Conference on
Performance Theory, Measurement, and Evaluation of Computer and Communication
Systems, Journal on Current Science, Transactions on Architecture and Code
Optimization (TACO), Workshop on mobile computing systems and applications
(WMCSA).
·
Senior
Member of Association of Computing Machinery
(SIGARCH special interest group), IEEE (Computer Society).
·
Honorary
Societies: Eta Kappa Nu (since 1995)
·
Various
committee lead roles at Rice University, Compaq, and Hewlett Packard
Other
Activities
·
Founding member, pan-IIT (www.iit.org) executive
council – Indian Institute of Technology Alumni Association, October 2002-present
·
Chair, constitution and charter definition committee
·
Comparison
of best practices of IIT associations, white paper
·
Invited
speaker, “How can Alumni make IIT’s world-class institutes?”, IIT50, Los
Angeles, April 2002, featured in India
West article, May 2002
·
Several invited talks and panels on alumni-interest
topics at venues across the country
·
IIT
leadership council, Stamford, September 2002
·
Chair,
“Alumni Services”
·
Secretary
(and Founding Director), IIT Madras
Alumni Association of North America Inc., 1999-2001
·
Secretary, North American chapter of the IIT Madras
Alumni Association (http://www.iitmalumni.org/), 1995-1999.
·
Chair
of web-page design, constitution, editorial, and
strategic vision committees.
·
Founder-member, Friends of Young Minds (http://www.ruf.rice.edu/~foym).
·
Member, India Business and Technology Consortium (http://www.ruf.rice.edu/~ibtc).
·
Special-effects' staff, First Presbyterian Church
Drama Group, Fall 1994.