Hewlett Packard Research Labs
1501 Page Mill Road MS 1177
Palo Alto, California 94304
Phone: (650) 857-2238

Fax: (650) 857-7029

Email: Partha.ranganathan@hp.com

Parthasarathy Ranganathan

(Partha)

http://www.hpl.hp.com/personal/Partha_Ranganathan/

Home

6415 Devonshire Place
San Jose, CA 95129
Phone: (408)-352-5495
Cell phone: (650) 743-6445

Email: Partha.ranganathan@gmail.com

Research Interests

Computer systems architecture and management, power efficiency, parallel and distributed computing

Key projects

· Exascale datacenters; blades++ (TCO-aware next-generation blade systems)

· SmartPower (power-efficient high-performance system, power modeling)

· RSIM (system evaluation & architectures for media and database applications)

Education

Ph.D., May 2000, Electrical and Computer Engineering, Rice University (GPA: 4.03/4.00)

Design of General-Purpose Systems for Emerging Applications

M.S., 1997, Electrical and Computer Engineering, Rice University (GPA: 4.03/4.00)

An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors

B.Tech., 1994, Electrical Engineering, Indian Institute of Technology (IIT), Madras (GPA: 9.1/10)

Employment History

Hewlett Packard Labs/Compaq Western Research Lab, Palo Alto USA, 2000—current

Distinguished technologist, 2008-current

Principal research scientist, 2004-2008

Senior research scientist, 2003- 2004

Research scientist/Member Technical Staff, 2000- 2003

Hewlett Packard Labs, Bangalore/HP Systems Technology & Software Division (STSD), Bangalore

Visiting research scientist, Summer 2008

Research Assistant, Rice University, 1995-2000

Research Intern, Digital Western Research Laboratory, Summer 1997

Research Intern, Digital Western Research Laboratory, Summer 1996

Awards and Recognition

· 6 internal company recognition awards

· ISCA 2008 paper recognized in IEEE Micro “Top Picks from Computer Architecture Conferences” (year’s 12 most significant research publications in computer architecture based on novelty and long term impact).

· Rice University Outstanding Young Engineering Alumnus, 2008, for notable accomplishments as an engineer and contributions to Rice and the community.

· Technology review top 35 young innovators, 2007, who will create the future by transforming existing industries and establishing new ones

· ESSL Research Leadership Award “for achieving recognition as a power management expert in the HP internal and external system architecture community”, December 2006, Awarded to one person at the lab level

· IEEE Senior Member, August 2006, ACM Senior Member, December 2006

· Hewlett Packard e-Award, in recognition of creating a virtual team to overcome international and organizational boundaries while combining two unique technology areas, namely user interfaces and low power design for new HP PDA products, April 2004

· Alumni Acknowledgement Award, Indian Institute of Technology, Madras, July 2002

· Alumni Service Award, IIT Madras Alumni Association of North America, February 2002

· Lodeiska Stockbridge Vaughan Fellowship, for outstanding achievement and promise, 1996-1997
(awarded to one graduate student from all departments in the Rice School of Engineering.)

· Rice University Fellowship, 1994-1995

· Government of India -- Certificate of Merit, 1990

Selected Press Features

(40+ interviews and features, in magazines and newspapers in North America, South America, Asia, and Europe)

· “Fully coordinated”, HPL cover feature; zdnet.com, April 2009

· “Innovating in techcon,”, hpl.hp.com, May 2009

· HP Labs Annual report, December 2008

· “HP Labs aims at exascale computing,” EEtimes, September, 2008

· Hp.com patent profile (“features the company’s most creative people — the top inventors, patent holders and engineers – and what inspires them”), August, 2008

· “Proliferation of devices hinders energy efficiency,” IndUS BusinessJournal, March, 2008

· “HP Looks To Improve Power Management Coordination“, Slashdot 3/08

· “Looking at datacenter power of the future,” ComputerWorld, February 08

· “Benchmarking Power-Efficient Servers", Slashdot, 8/21/07

· “HP researcher achieves victory in power struggle,” EE times, August 2007

· “Future stock”, Times of India, September 2007

· “MIT’s Tech Review Honors Young Energy Stars,” earth2tech.com

· “Building an energy efficient home computer,” blogs.zdnet.com, September 2007

· “HP's Green Data Center Portfolio Keeps Growing,” InternetNews.com, 2007

· HP Global Citizenship Report, 2006

· “The heat is off!” – featured in new ideas for revolutionary technology, MIT Technology Review, July 2005

· Slashdot and Tom’s hardware guide, March 2005 (250+ responses)

· Hp.com, physorg.com, News.PDA Live!, PDAlive.com, davesipaq.com. March 2005

· (French) L’Ordinateur individual, March 2005

· (Italian) Se Consumi Ti SpengoSE, WellcomeNews, March 2005

· (Swedish) Forskning & Framsteg, March 2005

· (Brazilian) A arte de economizar energia em portáteis, Jornal do Brasil, March 2005

· (German) Neue Displays verbrauchen weniger Strom, Welt am Sonntag, January 2005

· (Dutch) ArtikelAG, "PDA kan mit minder energy," December 2004

· “Energy-saving screens,” MIT Technology Revie, December 2004

· Mobile PC, "Fade to gray," November 2004

· Power Electronics Technology, “Smarter Power Management Techniques Promise More Power for Portables,” September 2004

· Lead feature in San Francisco Chronicle Business Section, “HP tests tactics to save batteries,” September 2004

· Business Week, “The Race for Brawnier Batteries,” June 2004

· Video interviews

Everyday Edisons, PBS 2008

Pod-Planet.com, “Advances in power management,” Podcast interview, August 2007

Research Contributions

Exascale data centers. I am the principal investigator for the exascale datacenter project at HP Labs. This research seeks to create and demonstrate an end-to-end data center infrastructure solution designed ground-up with total costs of ownership and manageability in focus. We systematically redesign individual platform elements as efficient building blocks with their role in the broader solution in mind, to be used in combination with a powerful management layer at the datacenter level to dynamically monitor and manage resources for global efficiency and improved capabilities. Sub-contributions of the project include (1) disaggregated shared platforms in dematerialized datacenters, with powerful hardware-aware resource management co-designed into the virtualization layer, (2) connected by an end-to-end networking architecture, spanning vNICs to switches, providing QoS management over converged fabrics, (3) with rich management and platform capabilities delivered through a ecosystem of virtual appliances driven by powerful abstractions for cross-layer communication and coordination.

Power- and energy-efficiency. My recent research focuses on designing power- and energy-efficient systems for future computing environments (from small mobile devices to dense servers in data centers). Some of the contributions of this work include: Energy-adaptive displays and energy-aware user interfaces that pioneered the notion of displays that adapt their energy consumption based on scope of user interest; this improves display battery usage two-fold to twenty-fold. Heterogeneous multi-core architectures that propose the use of core diversity in chip multiprocessor to match workload requirements to architectural power efficiency; this enables two-fold to ten-fold improvements in processor power. Power-aware blade architectures that propose the notion of power budget enforcement at the enclosure level through hardware-software co-ordination to leverage variations in typical usage patterns; this improves blade power budgets by a factor of two. Facilities-aware data center resource provisioning solutions that adapt workload scheduling to optimize for power and cooling costs in addition to performance; for example, temperature-aware resource scheduling can reduce annual cooling costs (often millions of dollars) in large data centers by half. Our work has also developed several new approaches for power measuring and monitoring, including JouleSort, energy-based statistical profiling, location-aware knowledge planes, as well as proxy-based environmental modeling. Using these tools, we have also performed several detailed studies (often the first such in the literature) of power consumption of real system deployments, and have influenced industry standards and metrics.

High-performance and better programmability. My dissertation research focused on application-optimized architecture designs in response to changes in the application mix favoring database, media, and communication applications, as well as improvements to performance, programmability, and simulation of multiprocessor systems enabled by the emergence of processors that aggressively leveraged instruction-level parallelism (ILP). Specific optimizations that emerged out of this work include reconfigurable caches – a design that enabled on-the-fly reuse of otherwise under-utilized memory resources, SC++ -- an implementation of sequential consistency that bridged the programmability-performance gap in memory consistency models, fuzzy and selective acquires – software-only primitives to reduce synchronization overheads, and algorithms for producer- and consumer-initiated prefetching for memory and coherence overhead. Also, as part of this work, we developed RSIM, the first public simulator that modeled ILP-based multiprocessors in great detail. RSIM has had more than 2000 unique downloads and has been shown to address large errors otherwise possible with earlier-generation simulators.

Patents

More than 50 patents pending or issued. Please see U.S. patents & trademark office (uspto.gov) for public information.

Keynotes, Panels, and Tutorials

1. Modeling for the exascale era: challenges and opportunities, Keynote presentation at the Workshop on Modeling, Benchmarking, and Simulations (MoBS), held in conjunction with the International Symposium on Computer Architecture (ISCA), June 2009

2. Rethinking the systems stack, Keynote presentation at the Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA), held in conjunction with the International Symposium on Computer Architecture (ISCA), June 2009

3. A Science of Power Management: a systems perspective, Presentation at the National Science Foundation Science of Power Workshop, April 2009

4. The manageability wall in the exascale era: opportunities and challenges, Keynote presentation at the Workshop on managed many-core systems (MMCS), held in conjunction with the International Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2009

5. Designing servers and datacenters for the exascale computing era, Keynote presentation at the Rice University Industrial Affiliates Meeting, 2008

6. System implications of integrated photonics (with Norm Jouppi), International Symposium on Low Power Electronics, September, 2008

7. The Innovation Process, with the exascale datacenter as a case study, HP GDIC Innovation Symposium, August 2008

8. Low-Power PDA displays, Keynote feature presentation at PortablePower 2004

9. The Power Management Challenge: Getting the Next 100X, Keynote presentation at the 2^nd workshop on optimizations for DSPs and Embedded Systems, 2004

10. Panel Participation:

o Cloud computing opportunities: an infrastructure perspective, HP Techcon, May 2009

o Panel chair, industrial perspectives on architectural challenges, HPCA, February 2009

o Towards a zero-carbon footprint for the IT ecosystem: energy-efficient servers and datacenters, Canada-California Strategic Innovation Partnership Green IT workshop, 2008

o Rethinking server design for the ensemble, Gigascale institute workshop, 2008

o Panel Chair, “Power management from cores to datacenters: where are we going to get the next 10X?”, ISLPED 2008

o Exascale Software Challenges DARPA white paper, July 2008

o National Science Foundation, Computer systems panel, April 2008

o “Energy-efficient Next-Generation Data Centers for Sustainable Business Outcomes”, HP Press Panel, July 2007

o National Science Foundation, Computer systems panel, January 2007

o National Science Foundation, Computer systems panel, September 2005

o Panel – “Important Research Challenges in Temperature-aware Computer Systems”, TACS, June 2005

o Panel – “New Products and Applications”, PortablePower 2004

o National Science Foundation, Computer systems panel, June 2004

o National Science Foundation, Computer systems panel, February 2003

o Round-table discussion on ``Limits and Future'', Workshop on Mixing Logic and DRAM: Chips that Compute and Remember, Denver. June 1997.

11. Tutorials

o Manageability-aware systems design, ISCA 2009

o Enterprise Power and Cooling: A chip-to-datacenter perspective, HotChips 2007

o Enterprise Power and Cooling: A chip-to-datacenter perspective, ASPLOS 2006

Book

1. Parthasarathy Ranganathan, Suzanne Rivoire, and T. N. Vijaykumar, “Power-aware computer architectures: from chips to data centers,” Elsevier, Under development, for June 2010

Publications (copies available from http://www.hpl.hp.com/personal/Partha_Ranganathan)

Under preparation

2. “Per-Core Power Gating for Efficient Power Management,” Jacob Leverich, Christos Kozyrakis, Matteo Monchiero, Parthasarathy Ranganathan, Vanish Talwar, 2009 [pdf]

3. “Unified power and cooling management for containers”, Niraj Tolia, Zhikui Wang, Manish Marwah, Cullen Bash, Parthasarathy Ranganathan, Xiaoyun Zhu, 2009 [pdf]

4. “COVERT: Configurable Virtual Redundancy with Transparent Availability on Commodity Software,” Nidhi Aggarwal, John Byrne, Norman Jouppi, Parthasarathy Ranganathan, Laura Ramirez, Jim Smith, Kewal Saluja, Bruce Walker, 2009 [pdf]

5. “The Golden Snich: integrated switch and NIC functionality for future manycore servers,” J. Mudigonda et al, 2009 [pdf]

6. “Defining and Evaluating Metrics for Manageability Efficiency," Jacob Leverich, Vanish Talwar, Parthasarathy Ranganathan, Christos Kozyrakis, 2007 [pdf]

7. “Closely Coupled Operating System Pairs for Emerging Manageability Architectures,” Vanish Talwar and Parthasarathy Ranganathan, 2008-144 HPL TR [pdf]

8. “Micromanagers: Platforms for Manageability in Future Virtualized Multicore Environments,” Matteo Monchiero et al, 2009 [pdf]

9. “Challenges in manageability-aware systems design”, R. Bianchini et al, 2009

10. “Green dematerialized servers”, J.Meza et al, 2009

11. “Meteorlogist: deconstructing the cloud for better resource management,” G. Lee et al, 2009

12. “Entropy-based anomaly detection for large-scale datacenters,” C. Wang et al, 2009

Reviewed publications

13. “Power-aware computing principles,” Parthasarathy Ranganathan, To appear in the Communications of the ACM, 2009 [pdf]

14. “Tracking the Power in an Enterprise Decision Support System,” Justin Meza, Mehul A. Shah, Parthasarathy Ranganathan, Mike Fitzner, Jay Veazey, Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), August 2009 [pdf

]

15. “Sustainable Data Centers: Enabled by Supply and Demand Side Management,” Prith Banerjee, Chandrakant Patel, Cullen Bash, Parthasarathy Ranganathan, Proceedings of the 46^th Design Automation Conference (DAC), July 2009 [pdf]

16. “Unified Thermal and Power Management in Server Enclosures,” Niraj Tolia, Zhikui Wang, Parthasarathy Ranganathan, Cullen Bash, Manish Marwah, and Xiaoyun Zhu, Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition (InterPACK '09), July 2009 [pdf]

17. “Optimal Fan Speed Control for Thermal Management of Servers,” Zhikui Wang, Cullen Bash, Niraj Tolia, Manish Marwah, Xiaoyun Zhu, and Parthasarathy Ranganathan, Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition (InterPACK '09), June 2009 [pdf]

18. “Disaggregated Memory for Expansion and Sharing in Blade Servers.” Kevin Lim, Jichuan Chang, Parthasarathy Ranganathan, Trevor Mudge, Steven K. Reinhardt, Thomas Wenisch. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA-36), June 2009. [pdf]

19. “Zephyr: A Model-based Approach to Optimizing Cooling for Power Efficiency in Blade Enclosures,” Niraj Tolia et al, Proceedings of HP Techcon, May 2009 [hp-pdf]

20. “High Availability and Data Integrity for Industry Standard Servers On Demand,” John Byrne et al, Proceedings of HP Techcon, May 2009 [hp-pdf]

21. “Federated and Coordinated Systems Management for Scalability and Efficiency," Jeff Autor, Dwight Barron, Jeff Hilland, Vidhya Kannan, Sandeep K.S, Sundara Nagarajan, V. Prashanth, Partha Ranganathan, Vanish Talwar, Proceedings of HP Techcon, May 2009 [hp-pdf]