HP Labs Technical Reports



Click here for full text: PDF

Multiprocessor Memory Hierarchies

Huff, Richard; Snider, Greg; Schlansker, Michael S.

HPL-90-148

Keyword(s):

Abstract: Memory latency, bandwidth, and locality of reference will play larger roles in future parallel systems as processors speed up relative to main memory latency. Using an instruction level PA-RISC multiprocessor simulator, we examined hardware and software techniques that address these issues for small-scale, shared memory machines.

Back to Index

[Research] [News] [Tech Reports] [Palo Alto] [Bristol] [Japan] [Israel] [Site Map] [Home] [Hewlett-Packard]