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Software Pipelining and Superblock Scheduling: Compilation Techniques for VLIM Machines

Lee, Meng; Tirumalai, Partha P.; Ngai, Tin-Fook

HPL-92-78

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Abstract: Compilers for VLIW and superscalar processors have to expose instruction-level parallelism to effectively utilize the hardware. Software pipelining is a scheduling technique to overlap successive iterations of loops, while superblock scheduling extracts ILP from frequently executed traces. This paper describes an effort to employ both software pipelining and superblock scheduling techniques in a VLIW compiler. Our results show that the two techniques together are effective for accelerating a variety of programs.

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