HP Labs Technical Reports



HPL PlayDoh Architecture Specification: Version 1.0

Kathail, Vinod; Schlansker, Michael S.; Rau, B. Ramakrishna.

HPL-93-80

Keyword(s):

Abstract: HPL PlayDoh is a parametric processor architecture conceived for research in instruction-level parallelism (ILP). Its main purpose is to serve as a vehicle to investigate processor architectures having significant parallelism and to investigate the compiler technology needed to effectively exploit such architectures. The PlayDoh architecture is parametric in that it admits machines of different composition and scale, especially with respect to the nature and amount of parallelism offered. The architecture admits both VLIW and superscalar implementations so as to provide a basis for understanding the merits and demerits of the two styles of implementation. This report describes those parts of the architecture that are common to all machines in the family. It introduces the basic concepts such as the structure of an instruction, instruction execution semantics, the types of register files, etc. and describes the semantics of the operation repertoire.

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