HP Labs Technical Reports
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Key Components in the Design of Image and Video Compression ICs
Abstract: There is a new generation of digital signal processors for image and video compression and decompression. Regardless of their complexity, most of the image and video compression architectures share three major components: an accelerator for computing two-dimensional DCTs and IDCTs, a motion estimator, and a variable length coder and decoder. This paper presents a general overview of some of the most common designs and architectures for the hardware implementation of these key components in image compression ICs.
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