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Elcor's Machine Description System: Version 3.0
Aditya, Shail; Kathail, Vinod; Rau, B. Ramakrishna
Keyword(s): retargetable compilers; table-driven compilers; machine description; processor description; instruction-level parallelism; EPIC processors; VLIW processors; HPL-PD, EPIC compilers; VLIW compilers; code generation; scheduling; register allocation
Abstract: This report is intended to serve as a user and reference manual for Elcor's Machine Description System. In this report, we address the information that Elcor, our retargetable EPIC compiler for HPL-PD, needs about the processor for which it is generating code. This information makes it possible to write Elcor as a "table-driven" compiler that has no detailed assumptions regarding the processor built into the code. Instead, it makes queries to a machine- description database which provides the required information about the processor. Consequently, Elcor can be retargeted to different HPL-PD processors by merely changing the contents of this database, despite the fact that the processors vary quite significantly. This report describes the internal data structures of Elcor's machine description database, the procedural interface between the compiler and the database, and a high-level data-description language for specifying processors within the HPL-PD space.
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