A High-Performance, Low-Cost Multiprocessor Bus for Workstations and Midrange Servers
The Runway bus, a synchronous, 64-bit, split-transaction, time multiplexed address and data bus, is a new processor-memory-I/O interconnect optimized for one-way to four-way symmetric multiprocessing systems. It is capable of sustained memory bandwidths of up to 768 megabytes per second in a four-way system.
by William R. Bryg, Kenneth K. Chan, and Nicholas S. Fiduccia
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