hewlett-packard UNITED STATES
Skip site-wide navigation link group hewlett-packard home products and services support solutions how to buy
hewlett-packard logo with invent tag line - jump to hp.com home page
End of site-wide navigation link group
printable version
hp journal online
hp labs skip lorem ipsum dolor navigation menu link group
contact hp
in this issue
table of contents
about the cover
what's ahead
online issues
hp journal home
hp labs home
about hp labs
news and events
careers @ labs
technical reports
worldwide sites
end of lorem ipsum dolor navigation menu link group
go to article skip lorem ipsum dolor navigation menu link group
1 2 3 4 5
6 7 8 9 10
11 12 13 14 15
16 17
end of lorem ipsum dolor navigation menu link group
April 1997, Article 14

April 1997, Article 14

Designing, Simulating, and Testing an Analog Phase-Locked Loop in a Digital Environment

In designing a phase-locked loop for use on several HP ASICs, the digital portion of an existing phase-locked loop was transferred to a behavioral VHDL description and synthesized. A behavioral model was written for the analog section to allow the ASIC designers to run system simulations. A new leakage test was developed that has been very effective in screening out process defects in the filter of the original design.

by Thomas J. Thatcher, Michael M. Oshima, and Cindy Botelho

Article 14 - apr97a14.pdf

This article is available in Adobe Acrobat format (PDF). To view this article you need to have Acrobat Reader 2.0 or later installed on your system. The Acrobat reader is available free of charge in Unix, Dos, Windows and Macintosh formats. You can download the reader from Adobe Systems (www.adobe.com)
Skip page footer
printable version
privacy statement using this site means you accept its terms © 1994-2002 hewlett-packard company
End of page footer