PICO (Program In, Chip Out):
Automatically Designing Custom Computers
© 2002 IEEE, reprinted from IEEE
Computer, vol. 35, no. 9, pp. 39-47, September 2002.
Vinod Kathail, Shail Aditya, Rob Schreiber, B. Ramakrisha
(Bob) Rau, Darren Cronquist, and Mukund Sivaraman, all of
the Compiler and Architecture
Research Program in HP Labs.
The PICO (program in, chip out) project is a long-range research
effort to automate the design of optimized, application-specific
computing systems -- enabling rapid and cost-effective design
of custom chips when no adequately specialized, off-the-shelf
design is available. Although skeptics often assume that automated
design must emulate human designers who invent new solutions
to problems, PICO’s approach is to automatically pick the
most suitable designs from a well-engineered space of designs.
Such automation of embedded computer design promises an era
of increasing growth in the number and variety of innovative
smart products by lowering the barriers of design time, designer
availability, and design cost.
Read the full paper here.
Requires Adobe
Acrobat.
About the authors:
Vinod Kathail is an R&D Program Manager in the
Compiler and Architecture Research (CAR) Program, responsible
for the PICO project. Kathail joined HP Labs in 1990 as a
member of the team that was working on a new style of architecture,
now known as EPIC. He co-invented some of the novel architectural
concepts such as data speculation and a new instruction set
for predicated execution. He co-authored the first publication
that describes the core EPIC concepts and a research architecture
based on these concepts.
Shail-Aditya Gupta is a senior research scientist
at HP Labs and chief architect of the synthesis backend of
the PICO project, which includes the automatic
design and synthesis of custom VLIW processors as well as
the automatic synthesis of custom, non-programmable loop accelerators.
He was
instrumental in the research, design, and development of several
key ideas and modules within the PICO infrastructure including
the abstract architecture specification (archspec) and the
detailed
architecture intermediate representation (AIR).
Rob Schreiber is a Principle Scientist at HP Labs,
known for important basic research in sequential and parallel
algorithms for matrix computation and in compiler optimization
for data-parallel languages. He is a contributor to the Matlab
scientific computing environment, and is a co-developer of
the High Performance Fortran programming language. He has
written over eighty scientific papers. He is on the editorial
boards of three journals in the scientific and supercomputing
fields, and is area editor for scientific computing of the
Journal of the ACM.
B. Ramakrisha (Bob) Rau is an HP
Fellow and director of the Compiler and Architecture Research
(CAR) Program. Rau is a pioneer in the field of VLIW computing,
having been active in this area since its inception in 1980.
Many of the central architectural and compiler ideas in the
VLIW and EPIC style of computing were conceived of and developed
by him. In 1984, prior to joining HP, Rau co-founded Cydrome
Inc. and was the Chief Architect of the Cydra 5 mini-supercomputer,
one of the very first commercial VLIW products. He is an IEEE
Fellow. He has fifteen patents and numerous research publications
in the area of VLIW, EPIC, high-performance computing, and
automated computer system design. He has also co-edited a
book on instruction-level parallelism.
Darren Cronquist joined HP Labs in 1999 as a Software
Design Engineer. His primary research interest is the design
of new architectures, compilers, and languages that improve
the cost/performance of embedded applications. At HP Labs,
he has been working on the research and development of PICO,
an architecture synthesis system for the automatic generation
of custom hardware for embedded applications.
Mukund Sivaraman is an R&D engineer at HP Labs,
currently involved in the PICO (Program In, Chip Out) project,
whose goal is to develop a system that automatically designs
custom computer systems for embedded applications. Prior to
joining HP Labs, Mukund worked in the Integrated Circuits
Business Division (ICBD) at HP from 1997 to 1999, where he
developed timing and functional verification methodologies
for ASIC design flows.
IEEE copyright notice: This
material is posted here with permission of the IEEE. Such
permission
of the IEEE does not in any way imply IEEE endorsement of
any of HP Labs's
products or services Internal or personal use of this material
is permitted. However, permission to reprint/republish this
material for advertising or promotional purposes or for creating
new collective work for resale or redistribution must be obtained
from the IEEE by sending a blank email message to pubs-permissions@ieee.org.
By choosing to view this document, you agree to all provisions
of
the copyright laws protecting it.
|
printable version
