HP Labs Technical Reports



Click here for full text: PDF

Predicting Load Latencies Using Cache Profiling

Abraham, Santosh; Rau, B. Ramakrishna.

HPL-94-110

Keyword(s):

Abstract: Due to increasing cache-miss latencies, cache control instructions are being implemented for future systems. In order to investigate the potential benefit of using these instructions in compiling a broad range of applications, we study the memory referencing behavior of individual machine-level instructions using simulations of fully-associative caches. Our objective is to obtain a deeper understanding of useful program behavior that can be eventually employed at optimizing programs and to motivate architectural features aimed at improving the efficacy of memory hierarchies. Our simulation results show that a small number of load instructions account for a majority of data cache misses in the SPEC89 benchmarks. Most load instructions rarely miss the data cache and a few instructions have miss rates much higher than the global miss ratio. We develop a model where the cost associated with scheduling loads with miss latencies is parameterized. Using this model, we explore the potential net benefit associated with scheduling loads with miss latencies is parameterized. Using this model, we explore the potential net benefit associated with profile-based scheduling of load instructions where some loads are selected for scheduling with miss latencies based on their behavior under profiling. Finally, we investigate the sensitivity of cache profiling information to input data sets. In many cases, the profile information obtained using one data set is quite effective in predicting the behavior of a program on other data sets, but in some cases the predicted caching behavior is quite different from the actual behavior.

Back to Index

[Research] [News] [Tech Reports] [Palo Alto] [Bristol] [Japan] [Israel] [Site Map][Home] [Hewlett-Packard]