HP Labs Technical Reports

Click here for full text: Postscript PDF

Hamlyn: A High-Performance Network Interface with Sender-Based Memory Management

Buzzard, Greg; Jacobson, David; Marovich, Scott; Wilkes, John



Abstract: The Hamlyn architecture for fast processor-interconnect interfaces uses sender-based memory management to eliminate receiver buffer over-runs, and a combination of protection algorithms that allows untrusting applications direct, concurrent access to the interface hardware, with full protection between them. We report here on some advances in the Hamlyn design since our original paper. We also give detailed performance information for both a prototype of the interface itself using the Myrinet interface from Myricom, and for a software protocol layer that sits atop the hardware interface. We show that Hamlyn performance is comparable to aggressive implementations of Active Messages on the CM-5, but Hamlyn also adds protection between applications and against faulty processors. Our analysis shows that if the interface were constructed as a set of hardware state machines, its performance would be limited almost solely by host bus and link speeds.

Back to Index

[Research] [News] [Tech Reports] [Palo Alto] [Bristol] [Japan] [Israel] [Site Map][Home] [Hewlett-Packard]